64 lines
1.2 KiB
Plaintext
64 lines
1.2 KiB
Plaintext
# Copyright (c) 2020,2022 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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if SOC_INTEL_CAVS_V25
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config SOC_TOOLCHAIN_NAME
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string
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default "intel_tgl_adsp"
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config SOC
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default "intel_tgl_adsp"
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# For backward compatibility, to be removed
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config SOC_SERIES_INTEL_CAVS_V25
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def_bool y
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# Hardware has four cores, limited to two pending test fixes
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config MP_MAX_NUM_CPUS
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default 2
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 400000000 if XTENSA_TIMER
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default 38400000 if INTEL_ADSP_TIMER
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config CAVS_ICTL_0_OFFSET
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default 6
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config CAVS_ICTL_1_OFFSET
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default 10
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config CAVS_ICTL_2_OFFSET
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default 13
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config CAVS_ICTL_3_OFFSET
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default 16
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config 2ND_LVL_INTR_00_OFFSET
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default CAVS_ICTL_0_OFFSET
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config 2ND_LVL_INTR_01_OFFSET
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default CAVS_ICTL_1_OFFSET
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config 2ND_LVL_INTR_02_OFFSET
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default CAVS_ICTL_2_OFFSET
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config 2ND_LVL_INTR_03_OFFSET
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default CAVS_ICTL_3_OFFSET
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config MAX_IRQ_PER_AGGREGATOR
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default 32
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config NUM_2ND_LEVEL_AGGREGATORS
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default 4
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config 2ND_LVL_ISR_TBL_OFFSET
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default 21
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config CAVS_ISR_TBL_OFFSET
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default 2ND_LVL_ISR_TBL_OFFSET
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if KERNEL_VM_SUPPORT
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config KERNEL_VM_SIZE
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default 0x800000
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endif
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config ADSP_NEED_POWER_ON_CACHE
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default y
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endif # SOC_INTEL_CAVS_V25
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