zephyr/soc/xtensa/intel_adsp
Rander Wang efc3208189 soc: intel_adsp: cavs: mask idc interrupt before halting cpu
Secondary dsp is idle and waiting for interrupt before it is totally
halted. The other active cores can trigger idc interrupt to this core,
this can wake it up and result to fw panic. Mask idc interrupt as timer
interrupt to prevent this case.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2023-11-22 14:57:07 +00:00
..
ace cmake: cleanup and simplify the standard include logic in Zephyr 2023-11-06 18:57:30 -05:00
cavs soc: intel_adsp: cavs: mask idc interrupt before halting cpu 2023-11-22 14:57:07 +00:00
common cmake: cleanup and simplify the standard include logic in Zephyr 2023-11-06 18:57:30 -05:00
tools
CMakeLists.txt cmake: cleanup and simplify the standard include logic in Zephyr 2023-11-06 18:57:30 -05:00
Kconfig arch/xtensa: clean up arch_cpu_idle function 2023-11-20 11:14:41 +01:00
Kconfig.defconfig
Kconfig.soc