95b8493857
This is a specific case for NVMe where given data buffer pointers must be dword (4 bytes) aligned. There is no virtual memory management between the user thread and NVMe driver (which one could detect such wrong alignement on physical memory and thus reallocate the memory properly, so it would be fully transparent for the user thread), thus the need to push that check to the user. This has been going under the radar so far as Qemu does not seem to follow NVMe specifications where PRP1 (in DPTR) must always be dword-aligned. It really does not follow the rule: specifications details that if bits 1:0 of PRP1 are set, the controller may generate an error or treat the address as if these bits were unset. Seems like a bug in Qemu, I did not check the code there however. Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com> |
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| .. | ||
| nvme | ||
| CMakeLists.txt | ||
| Kconfig | ||
| Kconfig.flash | ||
| Kconfig.mmc | ||
| Kconfig.ram | ||
| Kconfig.sdmmc | ||
| flashdisk.c | ||
| mmc_subsys.c | ||
| ramdisk.c | ||
| sdmmc_sdhc.h | ||
| sdmmc_stm32.c | ||
| sdmmc_subsys.c | ||