352 lines
10 KiB
C
352 lines
10 KiB
C
/*
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* Copyright (c) 2016-2017 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <soc.h>
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#include <clock_control.h>
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#include <system_timer.h>
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#include <drivers/clock_control/nrf5_clock_control.h>
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#include <arch/arm/cortex_m/cmsis.h>
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#include <sys_clock.h>
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/*
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* Convenience defines.
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*/
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#define SYS_CLOCK_RTC NRF_RTC1
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#define RTC_COUNTER SYS_CLOCK_RTC->COUNTER
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#define RTC_CC_VALUE SYS_CLOCK_RTC->CC[0]
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#define RTC_CC_EVENT SYS_CLOCK_RTC->EVENTS_COMPARE[0]
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/* Minimum delta between current counter and CC register that the RTC is able
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* to handle
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*/
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#define RTC_MIN_DELTA 2
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#define RTC_MASK 0x00FFFFFF
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/* Maximum difference for RTC counter values used. Half the maximum value is
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* selected to be able to detect overflow (a negative value has the same
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* representation as a large positive value).
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*/
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#define RTC_HALF (RTC_MASK / 2)
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#define RTC_TICKS_PER_SYS_TICK ((u32_t)((((u64_t)1000000UL / \
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CONFIG_SYS_CLOCK_TICKS_PER_SEC) * \
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1000000000UL) / 30517578125UL) & RTC_MASK)
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extern s32_t _sys_idle_elapsed_ticks;
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/*
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* rtc_past holds the value of RTC_COUNTER at the time the last sys tick was
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* announced, in RTC ticks. It is therefore always a multiple of
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* RTC_TICKS_PER_SYS_TICK.
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*/
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static u32_t rtc_past;
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#ifdef CONFIG_TICKLESS_IDLE
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/*
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* Holds the maximum sys ticks the kernel expects to see in the next
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* _sys_clock_tick_announce().
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*/
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static u32_t expected_sys_ticks;
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#endif /* CONFIG_TICKLESS_IDLE */
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/*
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* Set RTC Counter Compare (CC) register to a given value in RTC ticks.
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*/
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static void rtc_compare_set(u32_t rtc_ticks)
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{
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u32_t rtc_now;
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/* Try to set CC value. We assume the procedure is always successful. */
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RTC_CC_VALUE = rtc_ticks;
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rtc_now = RTC_COUNTER;
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/* The following checks if the CC register was set to a valid value.
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* The first test checks if the distance between the current RTC counter
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* and the value (in the future) set in the CC register is too small to
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* guarantee a compare event being triggered.
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* The second test checks if the current RTC counter is higher than the
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* value written to the CC register, i.e. the CC value is in the past,
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* by checking if the unsigned subtraction wraps around.
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* If either of the above are true then instead of waiting for the CC
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* event to trigger in the form of an interrupt, trigger it directly
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* using the NVIC.
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*/
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if ((((rtc_ticks - rtc_now) & RTC_MASK) < RTC_MIN_DELTA) ||
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(((rtc_ticks - rtc_now) & RTC_MASK) > RTC_HALF)) {
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NVIC_SetPendingIRQ(NRF5_IRQ_RTC1_IRQn);
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}
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}
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/*
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* @brief Announces the number of sys ticks, if any, that have passed since the
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* last announcement, and programs the RTC to trigger the interrupt on the next
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* sys tick.
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*
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* This function is not reentrant. It is called from:
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*
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* * _timer_idle_exit(), which in turn is called with interrupts disabled when
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* an interrupt fires.
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* * rtc1_nrf5_isr(), which runs with interrupts enabled but at that time the
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* device cannot be idle and hence _timer_idle_exit() cannot be called.
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*
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* Since this function can be preempted, we need to take some provisions to
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* announce all expected sys ticks that have passed.
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*
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*/
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static void rtc_announce_set_next(void)
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{
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u32_t rtc_now, rtc_elapsed, sys_elapsed;
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/* Read the RTC counter one single time in the beginning, so that an
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* increase in the counter during this procedure leads to no race
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* conditions.
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*/
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rtc_now = RTC_COUNTER;
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/* Calculate how many RTC ticks elapsed since the last sys tick. */
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rtc_elapsed = (rtc_now - rtc_past) & RTC_MASK;
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/* If no sys ticks have elapsed, there is no point in incrementing the
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* counters or announcing it.
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*/
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if (rtc_elapsed >= RTC_TICKS_PER_SYS_TICK) {
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#ifdef CONFIG_TICKLESS_IDLE
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/* Calculate how many sys ticks elapsed since the last sys tick
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* and notify the kernel if necessary.
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*/
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sys_elapsed = rtc_elapsed / RTC_TICKS_PER_SYS_TICK;
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if (sys_elapsed > expected_sys_ticks) {
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/* Never announce more sys ticks than the kernel asked
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* to be idle for. The remainder will be announced when
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* the RTC ISR runs after rtc_compare_set() is called
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* after the first announcement.
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*/
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sys_elapsed = expected_sys_ticks;
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}
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#else
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/* Never announce more than one sys tick if tickless idle is not
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* configured.
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*/
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sys_elapsed = 1;
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#endif /* CONFIG_TICKLESS_IDLE */
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/* Store RTC_COUNTER floored to the last sys tick. This is
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* done, so that ISR can properly calculate that 1 sys tick
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* has passed.
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*/
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rtc_past = (rtc_past +
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(sys_elapsed * RTC_TICKS_PER_SYS_TICK)
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) & RTC_MASK;
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_sys_idle_elapsed_ticks = sys_elapsed;
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_sys_clock_tick_announce();
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}
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/* Set the RTC to the next sys tick */
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rtc_compare_set(rtc_past + RTC_TICKS_PER_SYS_TICK);
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}
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#ifdef CONFIG_TICKLESS_IDLE
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/**
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* @brief Place system timer into idle state.
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*
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* Re-program the timer to enter into the idle state for the given number of
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* sys ticks, counted from the previous sys tick. The timer will fire in the
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* number of sys ticks supplied or the maximum number of sys ticks (converted
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* to RTC ticks) that can be programmed into the hardware.
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*
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* This will only be called from idle context, with IRQs disabled.
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*
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* A value of -1 will result in the maximum number of sys ticks.
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*
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* Example 1: Idle sleep is entered:
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*
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* sys tick timeline: (1) (2) (3) (4) (5) (6)
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* rtc tick timeline : 0----100----200----300----400----500----600
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* ******************
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* 150
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*
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* a) The last sys tick was announced at 100
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* b) The idle context enters sleep at 150, between sys tick 1 and 2, with
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* sys_ticks = 3.
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* c) The RTC is programmed to fire at sys tick 1 + 3 = 4 (RTC tick 400)
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*
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* @return N/A
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*/
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void _timer_idle_enter(s32_t sys_ticks)
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{
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/* Restrict ticks to max supported by RTC without risking overflow. */
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if ((sys_ticks < 0) ||
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(sys_ticks > (RTC_HALF / RTC_TICKS_PER_SYS_TICK))) {
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sys_ticks = RTC_HALF / RTC_TICKS_PER_SYS_TICK;
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}
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expected_sys_ticks = sys_ticks;
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/* If ticks is 0, the RTC interrupt handler will be set pending
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* immediately, meaning that we will not go to sleep.
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*/
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rtc_compare_set(rtc_past + (sys_ticks * RTC_TICKS_PER_SYS_TICK));
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}
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/**
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*
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* @brief Handling of tickless idle when interrupted
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*
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* The function will be called by _sys_power_save_idle_exit(), called from
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* _arch_isr_direct_pm() for 'direct' interrupts, or from _isr_wrapper for
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* regular ones, which is called on every IRQ handler if the device was
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* idle, and optionally called when a 'direct' IRQ handler executes if the
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* device was idle.
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*
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* Example 1: Idle sleep is interrupted before time:
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*
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* sys tick timeline: (1) (2) (3) (4) (5) (6)
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* rtc tick timeline : 0----100----200----300----400----500----600
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* **************!***
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* 150 350
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*
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* Assume that _timer_idle_enter() is called at 150 (1) to sleep for 3
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* sys ticks. The last sys tick was announced at 100.
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*
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* On wakeup (non-RTC IRQ at 350):
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*
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* a) Notify how many sys ticks have passed, i.e., 350 - 150 / 100 = 2.
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* b) Schedule next sys tick at 400.
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*
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*/
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void _timer_idle_exit(void)
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{
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/* Clear the event flag and interrupt in case we woke up on the RTC
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* interrupt. No need to run the RTC ISR since everything that needs
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* to run in the ISR will be done in this call.
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*/
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RTC_CC_EVENT = 0;
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NVIC_ClearPendingIRQ(NRF5_IRQ_RTC1_IRQn);
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rtc_announce_set_next();
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/* After exiting idle, the kernel no longer expects more than one sys
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* ticks to have passed when _sys_clock_tick_announce() is called.
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*/
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expected_sys_ticks = 1;
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}
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#endif /* CONFIG_TICKLESS_IDLE */
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/*
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* @brief Announces the number of sys ticks that have passed since the last
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* announcement, if any, and programs the RTC to trigger the interrupt on the
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* next sys tick.
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*
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* The ISR is set pending due to a regular sys tick and after exiting idle mode
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* as scheduled.
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*
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* Since this ISR can be preempted, we need to take some provisions to announce
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* all expected sys ticks that have passed.
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*
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* Consider the following example:
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*
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* sys tick timeline: (1) (2) (3) (4) (5) (6)
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* rtc tick timeline : 0----100----200----300----400----500----600
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* !**********
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* 450
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*
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* The last sys tick was anounced at 200, i.e, rtc_past = 200. The ISR is
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* executed at the next sys tick, i.e. 300. The following sys tick is due at
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* 400. However, the ISR is preempted for a number of sys ticks, until 450 in
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* this example. The ISR will then announce the number of sys ticks it was
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* delayed (2), and schedule the next sys tick (5) at 500.
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*/
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static void rtc1_nrf5_isr(void *arg)
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{
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ARG_UNUSED(arg);
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RTC_CC_EVENT = 0;
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rtc_announce_set_next();
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}
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int _sys_clock_driver_init(struct device *device)
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{
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struct device *clock;
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ARG_UNUSED(device);
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clock = device_get_binding(CONFIG_CLOCK_CONTROL_NRF5_K32SRC_DRV_NAME);
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if (!clock) {
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return -1;
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}
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clock_control_on(clock, (void *)CLOCK_CONTROL_NRF5_K32SRC);
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rtc_past = 0;
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#ifdef CONFIG_TICKLESS_IDLE
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expected_sys_ticks = 1;
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#endif /* CONFIG_TICKLESS_IDLE */
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/* TODO: replace with counter driver to access RTC */
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SYS_CLOCK_RTC->PRESCALER = 0;
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SYS_CLOCK_RTC->CC[0] = RTC_TICKS_PER_SYS_TICK;
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SYS_CLOCK_RTC->EVTENSET = RTC_EVTENSET_COMPARE0_Msk;
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SYS_CLOCK_RTC->INTENSET = RTC_INTENSET_COMPARE0_Msk;
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/* Clear the event flag and possible pending interrupt */
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RTC_CC_EVENT = 0;
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NVIC_ClearPendingIRQ(NRF5_IRQ_RTC1_IRQn);
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IRQ_CONNECT(NRF5_IRQ_RTC1_IRQn, 1, rtc1_nrf5_isr, 0, 0);
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irq_enable(NRF5_IRQ_RTC1_IRQn);
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SYS_CLOCK_RTC->TASKS_CLEAR = 1;
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SYS_CLOCK_RTC->TASKS_START = 1;
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return 0;
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}
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u32_t _timer_cycle_get_32(void)
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{
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u32_t elapsed_cycles;
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elapsed_cycles = (RTC_COUNTER -
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(_sys_clock_tick_count * RTC_TICKS_PER_SYS_TICK))
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& RTC_MASK;
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return (_sys_clock_tick_count * sys_clock_hw_cycles_per_tick) +
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elapsed_cycles;
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}
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#ifdef CONFIG_SYSTEM_CLOCK_DISABLE
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/**
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*
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* @brief Stop announcing sys ticks into the kernel
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*
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* This routine disables the RTC1 so that timer interrupts are no
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* longer delivered.
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*
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* @return N/A
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*/
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void sys_clock_disable(void)
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{
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unsigned int key;
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key = irq_lock();
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irq_disable(NRF5_IRQ_RTC1_IRQn);
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SYS_CLOCK_RTC->EVTENCLR = RTC_EVTENCLR_COMPARE0_Msk;
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SYS_CLOCK_RTC->INTENCLR = RTC_INTENCLR_COMPARE0_Msk;
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SYS_CLOCK_RTC->TASKS_STOP = 1;
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SYS_CLOCK_RTC->TASKS_CLEAR = 1;
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irq_unlock(key);
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/* TODO: turn off (release) 32 KHz clock source.
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* Turning off of 32 KHz clock source is not implemented in clock
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* driver.
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*/
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}
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#endif /* CONFIG_SYSTEM_CLOCK_DISABLE */
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