68799d507d
It looks like all SoCs in tree check if an exception comes from an IRQ the same way, so let's provide a common logic by default, still customizable if the SoC selects RISCV_SOC_ISR_CHECK. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com> |
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.. | ||
offsets | ||
CMakeLists.txt | ||
asm_macros.inc | ||
coredump.c | ||
cpu_idle.c | ||
fatal.c | ||
fpu.S | ||
fpu.c | ||
irq_manage.c | ||
irq_offload.c | ||
isr.S | ||
pmp.S | ||
pmp.c | ||
prep_c.c | ||
reboot.c | ||
reset.S | ||
semihost.c | ||
smp.c | ||
switch.S | ||
thread.c | ||
tls.c | ||
userspace.S | ||
vector_table.ld |