107 lines
2.1 KiB
C
107 lines
2.1 KiB
C
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Cache manipulation
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*
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* This module contains functions for manipulation caches.
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*/
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#include <kernel.h>
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#include <arch/cpu.h>
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#include <sys/util.h>
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#include <toolchain.h>
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#include <cache.h>
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#include <stdbool.h>
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#include <cache.h>
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/*
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* these functions are defined in cache_s.S
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*/
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extern int z_is_clflush_available(void);
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extern void z_cache_flush_wbinvd(vaddr_t addr, size_t len);
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extern size_t z_cache_line_size_get(void);
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#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
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size_t sys_cache_line_size;
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#endif
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#if defined(CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED) || \
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defined(CONFIG_CLFLUSH_DETECT)
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/**
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*
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* @brief Flush cache lines to main memory
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*
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* No alignment is required for either <virt> or <size>, but since
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* sys_cache_flush() iterates on the cache lines, a cache line alignment for
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* both is optimal.
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*
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* The cache line size is specified either via the CONFIG_DCACHE_LINE_SIZE
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* kconfig option or it is detected at runtime.
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*
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* @return N/A
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*/
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static void arch_dcache_flush(void *start_addr, size_t size)
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{
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size_t line_size = sys_dcache_line_size_get();
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uintptr_t start = (uintptr_t)start_addr;
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uintptr_t end;
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if (line_size == 0U) {
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return;
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}
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size = ROUND_UP(size, line_size);
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end = start + size;
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for (; start < end; start += line_size) {
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__asm__ volatile("clflush %0;\n\t" : : "m"(start));
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}
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__asm__ volatile("mfence;\n\t");
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}
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int arch_dcache_range(void *addr, size_t size, int op)
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{
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if (op & K_CACHE_WB) {
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arch_dcache_flush(addr, size);
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return 0;
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}
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return -ENOTSUP;
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}
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#endif /* CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED || CLFLUSH_DETECT */
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#include <init.h>
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#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
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static void init_cache_line_size(void)
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{
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sys_cache_line_size = z_cache_line_size_get();
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}
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size_t arch_cache_line_size_get(void)
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{
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return sys_cache_line_size;
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}
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#endif
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static int init_dcache(const struct device *unused)
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{
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ARG_UNUSED(unused);
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#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
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init_cache_line_size();
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#endif
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return 0;
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}
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SYS_INIT(init_dcache, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
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