266 lines
6.0 KiB
C
266 lines
6.0 KiB
C
/*
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* Copyright (c) 2016 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <errno.h>
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#include <device.h>
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#include <init.h>
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#include <drivers/ioapic.h>
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#include <counter.h>
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#include <power.h>
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#include <soc.h>
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#include <misc/util.h>
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#include "qm_aon_counters.h"
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#include "qm_isr.h"
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static void aonpt_int_callback(void *user_data);
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static counter_callback_t user_cb;
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struct aon_data {
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#ifdef CONFIG_AON_API_REENTRANCY
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struct k_sem sem;
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#endif
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#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
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uint32_t device_power_state;
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#endif
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};
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#define AONPT_HAS_CONTEXT_DATA \
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(CONFIG_AON_API_REENTRANCY || CONFIG_DEVICE_POWER_MANAGEMENT)
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#if AONPT_HAS_CONTEXT_DATA
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static struct aon_data aonpt_context;
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#define AONPT_CONTEXT (&aonpt_context)
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#else
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#define AONPT_CONTEXT (NULL)
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#endif
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#ifdef CONFIG_AON_API_REENTRANCY
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#define RP_GET(dev) (&((struct aon_data *)(dev->driver_data))->sem)
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#else
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#define RP_GET(dev) (NULL)
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#endif
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static int aon_timer_qmsi_start(struct device *dev)
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{
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qm_aonpt_config_t qmsi_cfg;
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int result = 0;
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user_cb = NULL;
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qmsi_cfg.callback = NULL;
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qmsi_cfg.int_en = false;
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/* AONPT is a countdown timer. So, set the initial value to
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* the maximum value.
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*/
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qmsi_cfg.count = 0xffffffff;
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qmsi_cfg.callback_data = NULL;
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if (IS_ENABLED(CONFIG_AON_API_REENTRANCY)) {
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k_sem_take(RP_GET(dev), K_FOREVER);
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}
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if (qm_aonpt_set_config(QM_AONC_0, &qmsi_cfg)) {
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result = -EIO;
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}
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if (IS_ENABLED(CONFIG_AON_API_REENTRANCY)) {
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k_sem_give(RP_GET(dev));
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}
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return result;
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}
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static int aon_timer_qmsi_stop(struct device *dev)
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{
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qm_aonpt_config_t qmsi_cfg;
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qmsi_cfg.callback = NULL;
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qmsi_cfg.int_en = false;
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qmsi_cfg.count = 0;
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qmsi_cfg.callback_data = NULL;
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if (IS_ENABLED(CONFIG_AON_API_REENTRANCY)) {
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k_sem_take(RP_GET(dev), K_FOREVER);
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}
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qm_aonpt_set_config(QM_AONC_0, &qmsi_cfg);
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if (IS_ENABLED(CONFIG_AON_API_REENTRANCY)) {
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k_sem_give(RP_GET(dev));
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}
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return 0;
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}
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static uint32_t aon_timer_qmsi_read(struct device *dev)
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{
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uint32_t value;
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qm_aonpt_get_value(QM_AONC_0, &value);
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return value;
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}
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static int aon_timer_qmsi_set_alarm(struct device *dev,
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counter_callback_t callback,
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uint32_t count, void *user_data)
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{
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qm_aonpt_config_t qmsi_cfg;
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int result = 0;
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/* Check if timer has been started */
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if (QM_AONC[QM_AONC_0].aonpt_cfg == 0) {
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return -ENOTSUP;
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}
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user_cb = callback;
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qmsi_cfg.callback = aonpt_int_callback;
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qmsi_cfg.int_en = true;
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qmsi_cfg.count = count;
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qmsi_cfg.callback_data = user_data;
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if (IS_ENABLED(CONFIG_AON_API_REENTRANCY)) {
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k_sem_take(RP_GET(dev), K_FOREVER);
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}
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if (qm_aonpt_set_config(QM_AONC_0, &qmsi_cfg)) {
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user_cb = NULL;
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result = -EIO;
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}
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if (IS_ENABLED(CONFIG_AON_API_REENTRANCY)) {
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k_sem_give(RP_GET(dev));
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}
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return result;
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}
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static uint32_t aon_timer_qmsi_get_pending_int(struct device *dev)
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{
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return QM_AONC[QM_AONC_0].aonpt_stat;
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}
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static const struct counter_driver_api aon_timer_qmsi_api = {
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.start = aon_timer_qmsi_start,
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.stop = aon_timer_qmsi_stop,
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.read = aon_timer_qmsi_read,
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.set_alarm = aon_timer_qmsi_set_alarm,
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.get_pending_int = aon_timer_qmsi_get_pending_int,
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};
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#ifdef CONFIG_DEVICE_POWER_MANAGEMENT
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static void aonpt_qmsi_set_power_state(struct device *dev, uint32_t power_state)
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{
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struct aon_data *context = dev->driver_data;
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context->device_power_state = power_state;
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}
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static uint32_t aonpt_qmsi_get_power_state(struct device *dev)
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{
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struct aon_data *context = dev->driver_data;
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return context->device_power_state;
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}
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#ifdef CONFIG_SYS_POWER_DEEP_SLEEP
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static int aonpt_suspend_device(struct device *dev)
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{
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aonpt_qmsi_set_power_state(dev, DEVICE_PM_SUSPEND_STATE);
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return 0;
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}
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static int aonpt_resume_device_from_suspend(struct device *dev)
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{
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uint32_t int_aonpt_mask;
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/* The interrupt router registers are sticky and retain their
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* values across warm resets, so we don't need to save them.
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* But for wake capable peripherals, if their interrupts are
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* configured to be edge sensitive, the wake event will be lost
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* by the time the interrupt controller is reconfigured, while
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* the interrupt is still pending. By masking and unmasking again
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* the corresponding routing register, the interrupt is forwared
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* to the core and the ISR will be serviced as expected.
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*/
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int_aonpt_mask = QM_INTERRUPT_ROUTER->aonpt_0_int_mask;
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QM_INTERRUPT_ROUTER->aonpt_0_int_mask = 0xFFFFFFFF;
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QM_INTERRUPT_ROUTER->aonpt_0_int_mask = int_aonpt_mask;
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aonpt_qmsi_set_power_state(dev, DEVICE_PM_ACTIVE_STATE);
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return 0;
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}
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#endif
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/*
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* Implements the driver control management functionality
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* the *context may include IN data or/and OUT data
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*/
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static int aonpt_qmsi_device_ctrl(struct device *dev, uint32_t ctrl_command,
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void *context)
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{
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if (ctrl_command == DEVICE_PM_SET_POWER_STATE) {
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#ifdef CONFIG_SYS_POWER_DEEP_SLEEP
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if (*((uint32_t *)context) == DEVICE_PM_SUSPEND_STATE) {
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return aonpt_suspend_device(dev);
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} else if (*((uint32_t *)context) == DEVICE_PM_ACTIVE_STATE) {
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return aonpt_resume_device_from_suspend(dev);
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}
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#endif
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} else if (ctrl_command == DEVICE_PM_GET_POWER_STATE) {
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*((uint32_t *)context) = aonpt_qmsi_get_power_state(dev);
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return 0;
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}
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return 0;
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}
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#else
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#define aonpt_qmsi_set_power_state(...)
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#endif
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static int aon_timer_init(struct device *dev)
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{
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dev->driver_api = &aon_timer_qmsi_api;
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user_cb = NULL;
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IRQ_CONNECT(IRQ_GET_NUMBER(QM_IRQ_AONPT_0_INT),
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CONFIG_AON_TIMER_IRQ_PRI, qm_aonpt_0_isr, NULL,
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IOAPIC_EDGE | IOAPIC_HIGH);
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irq_enable(IRQ_GET_NUMBER(QM_IRQ_AONPT_0_INT));
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QM_IR_UNMASK_INTERRUPTS(QM_INTERRUPT_ROUTER->aonpt_0_int_mask);
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if (IS_ENABLED(CONFIG_AON_API_REENTRANCY)) {
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k_sem_init(RP_GET(dev), 0, UINT_MAX);
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k_sem_give(RP_GET(dev));
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}
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aonpt_qmsi_set_power_state(dev, DEVICE_PM_ACTIVE_STATE);
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return 0;
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}
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DEVICE_DEFINE(aon_timer, CONFIG_AON_TIMER_QMSI_DEV_NAME, aon_timer_init,
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aonpt_qmsi_device_ctrl, AONPT_CONTEXT, NULL, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&aon_timer_qmsi_api);
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static void aonpt_int_callback(void *user_data)
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{
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if (user_cb) {
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(*user_cb)(DEVICE_GET(aon_timer), user_data);
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}
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}
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