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zephyr/dts/arm/nxp/nxp_rt.dtsi

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/*
* Copyright (c) 2017, NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/armv7-m.dtsi>
#include <dt-bindings/clock/imx_ccm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/i2c/i2c.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m7";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mpu: mpu@e000ed90 {
compatible = "arm,armv7m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <16>;
};
};
};
sysclk: system-clock {
compatible = "fixed-clock";
clock-frequency = <600000000>;
#clock-cells = <0>;
};
soc {
flexram0: flexram@400b0000 {
compatible = "nxp,imx-flexram";
reg = <0x400b0000 0x4000>;
interrupts = <38 0>;
#address-cells = <1>;
#size-cells = <1>;
itcm0: itcm@0 {
compatible = "nxp,imx-itcm";
reg = <0x00000000 0x20000>;
};
dtcm0: dtcm@20000000 {
compatible = "nxp,imx-dtcm";
reg = <0x20000000 0x20000>;
};
ocram0: ocram@20200000 {
compatible = "mmio-sram";
reg = <0x20200000 0x40000>;
};
};
flexspi0: spi@402a8000 {
compatible = "nxp,imx-flexspi";
reg = <0x402a8000 0x4000>;
interrupts = <108 0>;
label = "FLEXSPI0";
#address-cells = <1>;
#size-cells = <0>;
};
flexspi1: spi@402a4000 {
compatible = "nxp,imx-flexspi";
reg = <0x402a4000 0x4000>;
interrupts = <107 0>;
label = "FLEXSPI1";
#address-cells = <1>;
#size-cells = <0>;
};
semc0: semc0@402f0000 {
compatible = "nxp,imx-semc";
reg = <0x402f0000 0x4000>;
interrupts = <109 0>;
label = "SEMC0";
#address-cells = <1>;
#size-cells = <1>;
};
gpt1: gpt@401ec000 {
compatible = "nxp,imx-gpt";
reg = <0x401ec000 0x4000>;
interrupts = <100 0>;
label = "GPT1";
};
gpt2: gpt@401f0000 {
compatible = "nxp,imx-gpt";
reg = <0x401f0000 0x4000>;
interrupts = <101 0>;
label = "GPT2";
};
ccm: ccm@400fc000 {
compatible = "nxp,imx-ccm";
reg = <0x400fc000 0x4000>;
label = "CCM";
#clock-cells = <3>;
};
gpio1: gpio@401b8000 {
compatible = "nxp,imx-gpio";
reg = <0x401b8000 0x4000>;
interrupts = <80 0>, <81 0>;
label = "GPIO_1";
gpio-controller;
#gpio-cells = <2>;
};
gpio2: gpio@401bc000 {
compatible = "nxp,imx-gpio";
reg = <0x401bc000 0x4000>;
interrupts = <82 0>, <83 0>;
label = "GPIO_2";
gpio-controller;
#gpio-cells = <2>;
};
gpio3: gpio@401c0000 {
compatible = "nxp,imx-gpio";
reg = <0x401c0000 0x4000>;
interrupts = <84 0>, <85 0>;
label = "GPIO_3";
gpio-controller;
#gpio-cells = <2>;
};
gpio4: gpio@401c4000 {
compatible = "nxp,imx-gpio";
reg = <0x401c4000 0x4000>;
interrupts = <86 0>, <87 0>;
label = "GPIO_4";
gpio-controller;
#gpio-cells = <2>;
};
gpio5: gpio@400c0000 {
compatible = "nxp,imx-gpio";
reg = <0x400c0000 0x4000>;
interrupts = <88 0>, <89 0>;
label = "GPIO_5";
gpio-controller;
#gpio-cells = <2>;
};
i2c1: i2c@403f0000 {
compatible = "nxp,imx-lpi2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x403f0000 0x4000>;
interrupts = <28 0>;
clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 6>;
label = "I2C_1";
status = "disabled";
};
i2c2: i2c@403f4000 {
compatible = "nxp,imx-lpi2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x403f4000 0x4000>;
interrupts = <29 0>;
clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 8>;
label = "I2C_2";
status = "disabled";
};
i2c3: i2c@403f8000 {
compatible = "nxp,imx-lpi2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x403f8000 0x4000>;
interrupts = <30 0>;
clocks = <&ccm IMX_CCM_LPI2C_CLK 0x70 10>;
label = "I2C_3";
status = "disabled";
};
i2c4: i2c@403fc000 {
compatible = "nxp,imx-lpi2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x403fc000 0x4000>;
interrupts = <31 0>;
clocks = <&ccm IMX_CCM_LPI2C_CLK 0x80 24>;
label = "I2C_4";
status = "disabled";
};
iomuxc: iomuxc@401f8000 {
reg = <0x401f8000 0x4000>;
label = "PINMUX_0";
};
lcdif1: display-controller@402b8000 {
compatible = "fsl,imx6sx-lcdif";
reg = <0x402b8000 0x4000>;
interrupts = <42 0>;
label = "ELCDIF_1";
status = "disabled";
};
spi1: spi@40394000 {
compatible = "nxp,imx-lpspi";
reg = <0x40394000 0x4000>;
interrupts = <32 3>;
label = "SPI_1";
status = "disabled";
clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 0>;
#address-cells = <1>;
#size-cells = <0>;
};
spi2: spi@40398000 {
compatible = "nxp,imx-lpspi";
reg = <0x40398000 0x4000>;
interrupts = <33 3>;
label = "SPI_2";
status = "disabled";
clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 2>;
#address-cells = <1>;
#size-cells = <0>;
};
spi3: spi@4039c000 {
compatible = "nxp,imx-lpspi";
reg = <0x4039c000 0x4000>;
interrupts = <34 3>;
label = "SPI_3";
status = "disabled";
clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 4>;
#address-cells = <1>;
#size-cells = <0>;
};
spi4: spi@403a0000 {
compatible = "nxp,imx-lpspi";
reg = <0x403a0000 0x4000>;
interrupts = <35 3>;
label = "SPI_4";
status = "disabled";
clocks = <&ccm IMX_CCM_LPSPI_CLK 0x6c 6>;
#address-cells = <1>;
#size-cells = <0>;
};
uart1: uart@40184000 {
compatible = "nxp,kinetis-lpuart";
reg = <0x40184000 0x4000>;
interrupts = <20 0>;
clocks = <&ccm IMX_CCM_LPUART_CLK 0x7c 24>;
label = "UART_1";
status = "disabled";
};
uart2: uart@40188000 {
compatible = "nxp,kinetis-lpuart";
reg = <0x40188000 0x4000>;
interrupts = <21 0>;
clocks = <&ccm IMX_CCM_LPUART_CLK 0x68 28>;
label = "UART_2";
status = "disabled";
};
uart3: uart@4018c000 {
compatible = "nxp,kinetis-lpuart";
reg = <0x4018c000 0x4000>;
interrupts = <22 0>;
clocks = <&ccm IMX_CCM_LPUART_CLK 0x68 12>;
label = "UART_3";
status = "disabled";
};
uart4: uart@40190000 {
compatible = "nxp,kinetis-lpuart";
reg = <0x40190000 0x4000>;
interrupts = <23 0>;
clocks = <&ccm IMX_CCM_LPUART_CLK 0x6c 24>;
label = "UART_4";
status = "disabled";
};
uart5: uart@40194000 {
compatible = "nxp,kinetis-lpuart";
reg = <0x40194000 0x4000>;
interrupts = <24 0>;
clocks = <&ccm IMX_CCM_LPUART_CLK 0x74 2>;
label = "UART_5";
status = "disabled";
};
uart6: uart@40198000 {
compatible = "nxp,kinetis-lpuart";
reg = <0x40198000 0x4000>;
interrupts = <25 0>;
clocks = <&ccm IMX_CCM_LPUART_CLK 0x74 6>;
label = "UART_6";
status = "disabled";
};
uart7: uart@4019c000 {
compatible = "nxp,kinetis-lpuart";
reg = <0x4019c000 0x4000>;
interrupts = <26 0>;
clocks = <&ccm IMX_CCM_LPUART_CLK 0x7c 26>;
label = "UART_7";
status = "disabled";
};
uart8: uart@401a0000 {
compatible = "nxp,kinetis-lpuart";
reg = <0x401a0000 0x4000>;
interrupts = <27 0>;
clocks = <&ccm IMX_CCM_LPUART_CLK 0x80 14>;
label = "UART_8";
status = "disabled";
};
flexpwm1: flexpwm@403dc000 {
compatible = "nxp,flexpwm";
reg = <0x403dc000 0x4000>;
interrupts = <106 0>;
flexpwm1_pwm0: pwm0 {
compatible = "nxp,imx-pwm";
index = <0>;
label = "FLEXPWM1_PWM0";
interrupts = <102 0>;
#pwm-cells = <1>;
};
flexpwm1_pwm1: pwm1 {
compatible = "nxp,imx-pwm";
index = <1>;
label = "FLEXPWM1_PWM1";
interrupts = <103 0>;
#pwm-cells = <1>;
};
flexpwm1_pwm2: pwm2 {
compatible = "nxp,imx-pwm";
index = <2>;
label = "FLEXPWM1_PWM2";
interrupts = <104 0>;
#pwm-cells = <1>;
};
flexpwm1_pwm3: pwm3 {
compatible = "nxp,imx-pwm";
index = <3>;
label = "FLEXPWM1_PWM3";
interrupts = <105 0>;
#pwm-cells = <1>;
};
};
flexpwm2: flexpwm@403e0000 {
compatible = "nxp,flexpwm";
reg = <0x403e0000 0x4000>;
interrupts = <141 0>;
flexpwm2_pwm0: pwm0 {
compatible = "nxp,imx-pwm";
index = <0>;
label = "FLEXPWM2_PWM0";
interrupts = <137 0>;
#pwm-cells = <1>;
};
flexpwm2_pwm1: pwm1 {
compatible = "nxp,imx-pwm";
index = <1>;
label = "FLEXPWM2_PWM1";
interrupts = <138 0>;
#pwm-cells = <1>;
};
flexpwm2_pwm2: pwm2 {
compatible = "nxp,imx-pwm";
index = <2>;
label = "FLEXPWM2_PWM2";
interrupts = <139 0>;
#pwm-cells = <1>;
};
flexpwm2_pwm3: pwm3 {
compatible = "nxp,imx-pwm";
index = <3>;
label = "FLEXPWM2_PWM3";
interrupts = <140 0>;
#pwm-cells = <1>;
};
};
flexpwm3: flexpwm@403e4000 {
compatible = "nxp,flexpwm";
reg = <0x403e4000 0x4000>;
interrupts = <146 0>;
flexpwm3_pwm0: pwm0 {
compatible = "nxp,imx-pwm";
index = <0>;
label = "FLEXPWM3_PWM0";
interrupts = <142 0>;
#pwm-cells = <1>;
};
flexpwm3_pwm1: pwm1 {
compatible = "nxp,imx-pwm";
index = <1>;
label = "FLEXPWM3_PWM1";
interrupts = <143 0>;
#pwm-cells = <1>;
};
flexpwm3_pwm2: pwm2 {
compatible = "nxp,imx-pwm";
index = <2>;
label = "FLEXPWM3_PWM2";
interrupts = <144 0>;
#pwm-cells = <1>;
};
flexpwm3_pwm3: pwm3 {
compatible = "nxp,imx-pwm";
index = <3>;
label = "FLEXPWM3_PWM3";
interrupts = <145 0>;
#pwm-cells = <1>;
};
};
flexpwm4: flexpwm@403e8000 {
compatible = "nxp,flexpwm";
reg = <0x403e8000 0x4000>;
interrupts = <151 0>;
flexpwm4_pwm0: pwm0 {
compatible = "nxp,imx-pwm";
index = <0>;
label = "FLEXPWM4_PWM0";
interrupts = <147 0>;
#pwm-cells = <1>;
};
flexpwm4_pwm1: pwm1 {
compatible = "nxp,imx-pwm";
index = <1>;
label = "FLEXPWM4_PWM1";
interrupts = <148 0>;
#pwm-cells = <1>;
};
flexpwm4_pwm2: pwm2 {
compatible = "nxp,imx-pwm";
index = <2>;
label = "FLEXPWM4_PWM2";
interrupts = <149 0>;
#pwm-cells = <1>;
};
flexpwm4_pwm3: pwm3 {
compatible = "nxp,imx-pwm";
index = <3>;
label = "FLEXPWM4_PWM3";
interrupts = <150 0>;
#pwm-cells = <1>;
};
};
eth: ethernet@402d8000 {
compatible = "nxp,kinetis-ethernet";
reg = <0x402D8000 0x628>;
interrupts = <114 0>;
interrupt-names = "COMMON";
status = "disabled";
local-mac-address = [00 00 00 00 00 00];
label = "ETH_0";
ptp {
compatible = "nxp,kinetis-ptp";
status = "disabled";
interrupts = <115 0>;
interrupt-names = "IEEE1588_TMR";
};
};
trng: random@400cc000 {
compatible = "nxp,kinetis-trng";
reg = <0x400cc000 0x4000>;
status = "okay";
interrupts = <53 0>;
label = "TRNG";
};
usbd1: usbd@402e0000 {
compatible = "nxp,kinetis-usbd";
reg = <0x402E0000 0x200>;
interrupts = <113 1>;
interrupt-names = "usb_otg";
clocks = <&sysclk>;
num-bidir-endpoints = <8>;
maximum-speed = "full-speed";
status = "disabled";
label = "USBD_1";
};
usbd2: usbd@402e0200 {
compatible = "nxp,kinetis-usbd";
reg = <0x402E0200 0x200>;
interrupts = <112 1>;
interrupt-names = "usb_otg";
num-bidir-endpoints = <8>;
maximum-speed = "full-speed";
status = "disabled";
label = "USBD_2";
};
usdhc1: usdhc@402c0000 {
compatible = "nxp,imx-usdhc";
reg = <0x402c0000 0x4000>;
status = "disabled";
interrupts = <110 0>;
clocks = <&ccm IMX_CCM_USDHC1_CLK 0 0>;
label = "USDHC_1";
};
usdhc2: usdhc@402c4000 {
compatible = "nxp,imx-usdhc";
reg = <0x402c4000 0x4000>;
status = "disabled";
interrupts = <111 0>;
clocks = <&ccm IMX_CCM_USDHC2_CLK 0 0>;
label = "USDHC_2";
};
};
};
&nvic {
arm,num-irq-priority-bits = <4>;
};
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