150 lines
3.6 KiB
C
150 lines
3.6 KiB
C
/*
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* Copyright (c) 2016 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <sensor.h>
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#include <i2c.h>
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#include <gpio.h>
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#define SYS_LOG_DOMAIN "FXOS8700"
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#define SYS_LOG_LEVEL CONFIG_SYS_LOG_SENSOR_LEVEL
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#include <logging/sys_log.h>
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#define FXOS8700_REG_STATUS 0x00
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#define FXOS8700_REG_OUTXMSB 0x01
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#define FXOS8700_REG_INT_SOURCE 0x0c
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#define FXOS8700_REG_WHOAMI 0x0d
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#define FXOS8700_REG_XYZ_DATA_CFG 0x0e
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#define FXOS8700_REG_PULSE_CFG 0x21
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#define FXOS8700_REG_PULSE_SRC 0x22
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#define FXOS8700_REG_PULSE_THSX 0x23
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#define FXOS8700_REG_PULSE_THSY 0x24
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#define FXOS8700_REG_PULSE_THSZ 0x25
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#define FXOS8700_REG_PULSE_TMLT 0x26
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#define FXOS8700_REG_PULSE_LTCY 0x27
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#define FXOS8700_REG_PULSE_WIND 0x28
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#define FXOS8700_REG_CTRLREG1 0x2a
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#define FXOS8700_REG_CTRLREG2 0x2b
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#define FXOS8700_REG_CTRLREG3 0x2c
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#define FXOS8700_REG_CTRLREG4 0x2d
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#define FXOS8700_REG_CTRLREG5 0x2e
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#define FXOS8700_REG_M_OUTXMSB 0x33
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#define FXOS8700_REG_TEMP 0x51
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#define FXOS8700_REG_M_CTRLREG1 0x5b
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#define FXOS8700_REG_M_CTRLREG2 0x5c
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#define FXOS8700_DRDY_MASK (1 << 0)
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#define FXOS8700_PULSE_MASK (1 << 3)
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#define FXOS8700_XYZ_DATA_CFG_FS_MASK 0x03
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#define FXOS8700_PULSE_SRC_DPE (1 << 3)
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#define FXOS8700_CTRLREG1_ACTIVE_MASK 0x01
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#define FXOS8700_CTRLREG1_DR_MASK (7 << 3)
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#define FXOS8700_CTRLREG2_RST_MASK 0x40
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#define FXOS8700_M_CTRLREG1_MODE_MASK 0x03
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#define FXOS8700_M_CTRLREG2_AUTOINC_MASK (1 << 5)
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#define FXOS8700_NUM_ACCEL_CHANNELS 3
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#define FXOS8700_NUM_MAG_CHANNELS 3
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#define FXOS8700_NUM_HYBRID_CHANNELS 6
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#define FXOS8700_MAX_NUM_CHANNELS 6
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#define FXOS8700_BYTES_PER_CHANNEL_NORMAL 2
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#define FXOS8700_BYTES_PER_CHANNEL_FAST 1
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#define FXOS8700_MAX_NUM_BYTES (FXOS8700_BYTES_PER_CHANNEL_NORMAL * \
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FXOS8700_MAX_NUM_CHANNELS)
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enum fxos8700_power {
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FXOS8700_POWER_STANDBY = 0,
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FXOS8700_POWER_ACTIVE,
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};
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enum fxos8700_mode {
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FXOS8700_MODE_ACCEL = 0,
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FXOS8700_MODE_MAGN = 1,
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FXOS8700_MODE_HYBRID = 3,
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};
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enum fxos8700_range {
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FXOS8700_RANGE_2G = 0,
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FXOS8700_RANGE_4G,
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FXOS8700_RANGE_8G,
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};
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enum fxos8700_channel {
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FXOS8700_CHANNEL_ACCEL_X = 0,
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FXOS8700_CHANNEL_ACCEL_Y,
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FXOS8700_CHANNEL_ACCEL_Z,
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FXOS8700_CHANNEL_MAGN_X,
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FXOS8700_CHANNEL_MAGN_Y,
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FXOS8700_CHANNEL_MAGN_Z,
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};
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struct fxos8700_config {
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char *i2c_name;
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#ifdef CONFIG_FXOS8700_TRIGGER
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char *gpio_name;
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u8_t gpio_pin;
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#endif
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u8_t i2c_address;
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u8_t whoami;
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enum fxos8700_mode mode;
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enum fxos8700_range range;
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u8_t start_addr;
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u8_t start_channel;
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u8_t num_channels;
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#ifdef CONFIG_FXOS8700_PULSE
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u8_t pulse_cfg;
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u8_t pulse_ths[3];
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u8_t pulse_tmlt;
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u8_t pulse_ltcy;
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u8_t pulse_wind;
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#endif
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};
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struct fxos8700_data {
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struct device *i2c;
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struct k_sem sem;
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#ifdef CONFIG_FXOS8700_TRIGGER
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struct device *gpio;
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u8_t gpio_pin;
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struct gpio_callback gpio_cb;
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sensor_trigger_handler_t drdy_handler;
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#endif
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#ifdef CONFIG_FXOS8700_PULSE
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sensor_trigger_handler_t tap_handler;
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sensor_trigger_handler_t double_tap_handler;
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#endif
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#ifdef CONFIG_FXOS8700_TRIGGER_OWN_THREAD
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K_THREAD_STACK_MEMBER(thread_stack, CONFIG_FXOS8700_THREAD_STACK_SIZE);
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struct k_thread thread;
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struct k_sem trig_sem;
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#endif
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#ifdef CONFIG_FXOS8700_TRIGGER_GLOBAL_THREAD
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struct k_work work;
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struct device *dev;
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#endif
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s16_t raw[FXOS8700_MAX_NUM_CHANNELS];
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#ifdef CONFIG_FXOS8700_TEMP
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s8_t temp;
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#endif
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};
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int fxos8700_get_power(struct device *dev, enum fxos8700_power *power);
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int fxos8700_set_power(struct device *dev, enum fxos8700_power power);
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#if CONFIG_FXOS8700_TRIGGER
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int fxos8700_trigger_init(struct device *dev);
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int fxos8700_trigger_set(struct device *dev,
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const struct sensor_trigger *trig,
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sensor_trigger_handler_t handler);
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#endif
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