zephyr/arch/riscv/core
Yong Cong Sin de347a4e07 init: support per-core init hook
Allow SoC to implement their custom per-core initialization function by
selecting `CONFIG_SOC_PER_CORE_INIT_HOOK` and implement
`soc_per_core_init_hook()`.

Signed-off-by: Maxim Adelman <imax@meta.com>
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-11-16 14:04:25 -05:00
..
offsets
CMakeLists.txt arch: riscv: smp: allow other IPI implementation 2024-11-16 13:34:10 -05:00
asm_macros.inc
coredump.c riscv: support dumping privilege stack during coredump 2024-09-21 11:29:39 +02:00
cpu_idle.c
elf.c llext: Add RISC-V arch-specific relocations 2024-10-03 21:59:42 +01:00
fatal.c
fpu.S
fpu.c
ipi.c arch: riscv: smp: allow other IPI implementation 2024-11-16 13:34:10 -05:00
ipi_clint.c arch: riscv: smp: allow other IPI implementation 2024-11-16 13:34:10 -05:00
irq_manage.c
irq_offload.c arch: initialize irq_offload during boot, do not use SYS_INIT 2024-09-17 20:05:22 -04:00
isr.S arch: riscv: reset global pointer on exception 2024-11-13 19:08:54 -08:00
pmp.S
pmp.c
prep_c.c
reboot.c
reset.S
semihost.c
smp.c init: support per-core init hook 2024-11-16 14:04:25 -05:00
stacktrace.c
switch.S
thread.c arch: kernel: lib: toolchain: Standardize TLS keyword 2024-09-23 10:01:48 +02:00
tls.c
userspace.S
vector_table.ld