42 lines
1.1 KiB
C
42 lines
1.1 KiB
C
/*
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* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/device.h>
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#include <zephyr/kernel.h>
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#include <zephyr/spinlock.h>
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#include <zephyr/kernel_structs.h>
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#include <soc.h>
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#include <esp_cpu.h>
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#include <zephyr/drivers/interrupt_controller/intc_esp32.h>
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void smp_log(const char *msg)
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{
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while (*msg) {
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esp_rom_uart_tx_one_char(*msg++);
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}
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esp_rom_uart_tx_one_char('\r');
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esp_rom_uart_tx_one_char('\n');
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}
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void esp_appcpu_start(void *entry_point)
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{
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esp_cpu_unstall(1);
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if (!REG_GET_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_CLKGATE_EN)) {
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REG_SET_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_CLKGATE_EN);
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REG_CLR_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_RUNSTALL);
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REG_SET_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_RESETTING);
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REG_CLR_BIT(SYSTEM_CORE_1_CONTROL_0_REG, SYSTEM_CONTROL_CORE_1_RESETTING);
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}
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esp_rom_ets_set_appcpu_boot_addr((void *)entry_point);
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ets_delay_us(50000);
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smp_log("ESP32S3: CPU1 start sequence complete");
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}
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