zephyr/boards/riscv32
Maureen Helm cf1d374276 boards: rv32m1_vega: Introduce zero-riscy configuration
Introduces a new rv32m1_vega board configuration for the zero-riscy
core. It assumes that the soc has been reconfigured with openocd to boot
to the zero-riscy core instead of the ri5cy core.

Refactors the board-level device tree so the ri5cy and zero-riscy
configurations share common definitions for the led, button, and sensor
nodes.

Tested with:
- samples/hello_world
- samples/synchronization
- samples/basic/blinky
- samples/basic/button
- samples/sensor/fxos8700

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-05-06 14:52:17 -05:00
..
hifive1 kconfig: Use 'default' instead of 'def_bool' in Kconfig.defconfig files 2019-04-18 12:20:49 -04:00
m2gl025_miv license: cleanup: add SPDX Apache-2.0 license identifier 2019-04-07 08:45:22 -04:00
qemu_riscv32 license: cleanup: add SPDX Apache-2.0 license identifier 2019-04-07 08:45:22 -04:00
rv32m1_vega boards: rv32m1_vega: Introduce zero-riscy configuration 2019-05-06 14:52:17 -05:00
index.rst