198 lines
4.4 KiB
Plaintext
198 lines
4.4 KiB
Plaintext
# Kconfig.nrfx - nrfx UART configuration
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#
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# Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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menuconfig UART_NRFX
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bool "nRF UART nrfx drivers"
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default y
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select SERIAL_HAS_DRIVER
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select SERIAL_SUPPORT_INTERRUPT
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depends on SOC_FAMILY_NRF
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help
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Enable support for nrfx UART drivers for nRF MCU series.
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Peripherals with the same instance ID cannot be used together,
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e.g. UART_0 and UARTE_0.
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if UART_NRFX
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# ----------------- port 0 -----------------
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choice
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prompt "UART Port 0 Driver type"
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optional
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config UART_0_NRF_UART
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bool "nRF UART 0"
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depends on HAS_HW_NRF_UART0
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select NRF_UART_PERIPHERAL
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help
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Enable nRF UART without EasyDMA on port 0.
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config UART_0_NRF_UARTE
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bool "nRF UARTE 0"
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depends on HAS_HW_NRF_UARTE0
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select NRF_UARTE_PERIPHERAL
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help
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Enable nRF UART with EasyDMA on port 0.
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endchoice
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if UART_0_NRF_UART || UART_0_NRF_UARTE
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config UART_0_INTERRUPT_DRIVEN
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bool "Enable interrupt support on port 0"
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depends on UART_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART interrupt support on port 0.
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config UART_0_NRF_PARITY_BIT
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bool "Enable parity bit"
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help
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Enable parity bit.
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config UART_0_NRF_FLOW_CONTROL
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bool "Enable flow control"
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help
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Enable flow control. If selected, additionally two pins, RTS and CTS
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have to be configured.
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config UART_0_NRF_TX_BUFFER_SIZE
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int "Size of RAM buffer"
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depends on UART_0_NRF_UARTE
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range 1 65535
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default 32
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help
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Size of the transmit buffer for API function: fifo_fill.
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This value is limited by range of TXD.MAXCNT register for
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particular SoC.
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endif # UART_0_NRF_UART || UART_0_NRF_UARTE
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# ----------------- port 1 -----------------
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config UART_1_NRF_UARTE
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bool "nRF UARTE 1"
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depends on HAS_HW_NRF_UARTE1
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select NRF_UARTE_PERIPHERAL
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help
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Enable nRF UART with EasyDMA on port 1.
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if UART_1_NRF_UARTE
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config UART_1_INTERRUPT_DRIVEN
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bool "Enable interrupt support on port 1"
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depends on UART_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART interrupt support on port 1.
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config UART_1_NRF_PARITY_BIT
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bool "Enable parity bit"
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help
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Enable parity bit.
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config UART_1_NRF_FLOW_CONTROL
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bool "Enable flow control"
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help
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Enable flow control. If selected, additionally two pins, RTS and CTS
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have to be configured.
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config UART_1_NRF_TX_BUFFER_SIZE
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int "Size of RAM buffer"
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range 1 65535
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default 32
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help
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Size of the transmit buffer for API function: fifo_fill.
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This value is limited by range of TXD.MAXCNT register for
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particular SoC.
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endif # UART_1_NRF_UARTE
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# ----------------- port 2 -----------------
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config UART_2_NRF_UARTE
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bool "nRF UARTE 2"
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depends on HAS_HW_NRF_UARTE2
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select NRF_UARTE_PERIPHERAL
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help
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Enable nRF UART with EasyDMA on port 2.
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if UART_2_NRF_UARTE
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config UART_2_INTERRUPT_DRIVEN
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bool "Enable interrupt support on port 2"
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depends on UART_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART interrupt support on port 2.
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config UART_2_NRF_PARITY_BIT
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bool "Enable parity bit"
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help
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Enable parity bit.
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config UART_2_NRF_FLOW_CONTROL
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bool "Enable flow control"
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help
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Enable flow control. If selected, additionally two pins, RTS and CTS
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have to be configured.
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config UART_2_NRF_TX_BUFFER_SIZE
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int "Size of RAM buffer"
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range 1 65535
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default 32
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help
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Size of the transmit buffer for API function: fifo_fill.
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This value is limited by range of TXD.MAXCNT register for
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particular SoC.
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endif # UART_2_NRF_UARTE
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# ----------------- port 3 -----------------
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config UART_3_NRF_UARTE
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bool "nRF UARTE 3"
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depends on HAS_HW_NRF_UARTE3
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select NRF_UARTE_PERIPHERAL
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help
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Enable nRF UART with EasyDMA on port 3.
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if UART_3_NRF_UARTE
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config UART_3_INTERRUPT_DRIVEN
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bool "Enable interrupt support on port 3"
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depends on UART_INTERRUPT_DRIVEN
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default y
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help
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This option enables UART interrupt support on port 3.
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config UART_3_NRF_PARITY_BIT
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bool "Enable parity bit"
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help
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Enable parity bit.
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config UART_3_NRF_FLOW_CONTROL
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bool "Enable flow control"
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help
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Enable flow control. If selected, additionally two pins, RTS and CTS
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have to be configured.
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config UART_3_NRF_TX_BUFFER_SIZE
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int "Size of RAM buffer"
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range 1 65535
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default 32
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help
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Size of the transmit buffer for API function: fifo_fill.
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This value is limited by range of TXD.MAXCNT register for
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particular SoC.
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endif # UART_3_NRF_UARTE
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config NRF_UART_PERIPHERAL
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bool
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config NRF_UARTE_PERIPHERAL
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bool
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endif # UART_NRFX
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