191 lines
5.2 KiB
C
191 lines
5.2 KiB
C
/*
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* Copyright (c) 2023 Aleksandr Senin
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT zephyr_mdio_gpio
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/mdio.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(mdio_gpio, CONFIG_MDIO_LOG_LEVEL);
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#define MDIO_GPIO_READ_OP 0
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#define MDIO_GPIO_WRITE_OP 1
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#define MDIO_GPIO_MSB 0x80000000
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struct mdio_gpio_data {
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struct k_sem sem;
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};
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struct mdio_gpio_config {
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struct gpio_dt_spec mdc_gpio;
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struct gpio_dt_spec mdio_gpio;
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};
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static ALWAYS_INLINE void mdio_gpio_clock_the_bit(const struct mdio_gpio_config *dev_cfg)
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{
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k_busy_wait(1);
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gpio_pin_set_dt(&dev_cfg->mdc_gpio, 1);
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k_busy_wait(1);
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gpio_pin_set_dt(&dev_cfg->mdc_gpio, 0);
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}
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static ALWAYS_INLINE void mdio_gpio_dir(const struct mdio_gpio_config *dev_cfg, uint8_t dir)
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{
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gpio_pin_configure_dt(&dev_cfg->mdio_gpio, dir ? GPIO_OUTPUT_ACTIVE : GPIO_INPUT);
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if (dir == 0) {
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mdio_gpio_clock_the_bit(dev_cfg);
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}
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}
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static ALWAYS_INLINE void mdio_gpio_read(const struct mdio_gpio_config *dev_cfg, uint16_t *pdata)
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{
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uint16_t data = 0;
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for (uint16_t i = 0; i < 16; i++) {
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data <<= 1;
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mdio_gpio_clock_the_bit(dev_cfg);
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if (gpio_pin_get_dt(&dev_cfg->mdio_gpio) == 1) {
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data |= 1;
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}
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}
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*pdata = data;
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}
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static ALWAYS_INLINE void mdio_gpio_write(const struct mdio_gpio_config *dev_cfg,
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uint32_t data, uint8_t len)
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{
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uint32_t v_data = data;
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uint32_t v_len = len;
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v_data <<= 32 - v_len;
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for (; v_len > 0; v_len--) {
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gpio_pin_set_dt(&dev_cfg->mdio_gpio, (v_data & MDIO_GPIO_MSB) ? 1 : 0);
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mdio_gpio_clock_the_bit(dev_cfg);
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v_data <<= 1;
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}
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}
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static int mdio_gpio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad, uint8_t rw,
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uint16_t data_in, uint16_t *data_out)
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{
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const struct mdio_gpio_config *const dev_cfg = dev->config;
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struct mdio_gpio_data *const dev_data = dev->data;
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k_sem_take(&dev_data->sem, K_FOREVER);
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/* DIR: output */
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mdio_gpio_dir(dev_cfg, MDIO_GPIO_WRITE_OP);
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/* PRE32: 32 bits '1' for sync*/
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mdio_gpio_write(dev_cfg, 0xFFFFFFFF, 32);
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/* ST: 2 bits start of frame */
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mdio_gpio_write(dev_cfg, 0x1, 2);
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/* OP: 2 bits opcode, read '10' or write '01' */
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mdio_gpio_write(dev_cfg, rw ? 0x1 : 0x2, 2);
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/* PA5: 5 bits PHY address */
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mdio_gpio_write(dev_cfg, prtad, 5);
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/* RA5: 5 bits register address */
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mdio_gpio_write(dev_cfg, devad, 5);
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if (rw) { /* Write data */
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/* TA: 2 bits turn-around */
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mdio_gpio_write(dev_cfg, 0x2, 2);
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mdio_gpio_write(dev_cfg, data_in, 16);
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} else { /* Read data */
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/* Release the MDIO line */
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mdio_gpio_dir(dev_cfg, MDIO_GPIO_READ_OP);
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mdio_gpio_read(dev_cfg, data_out);
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}
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/* DIR: input. Tristate MDIO line */
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mdio_gpio_dir(dev_cfg, MDIO_GPIO_READ_OP);
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k_sem_give(&dev_data->sem);
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return 0;
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}
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static int mdio_gpio_read_mmi(const struct device *dev, uint8_t prtad, uint8_t devad,
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uint16_t *data)
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{
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return mdio_gpio_transfer(dev, prtad, devad, MDIO_GPIO_READ_OP, 0, data);
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}
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static int mdio_gpio_write_mmi(const struct device *dev, uint8_t prtad, uint8_t devad,
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uint16_t data)
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{
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return mdio_gpio_transfer(dev, prtad, devad, MDIO_GPIO_WRITE_OP, data, NULL);
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}
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static int mdio_gpio_initialize(const struct device *dev)
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{
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const struct mdio_gpio_config *const dev_cfg = dev->config;
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struct mdio_gpio_data *const dev_data = dev->data;
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int rc;
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k_sem_init(&dev_data->sem, 1, 1);
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if (!device_is_ready(dev_cfg->mdc_gpio.port)) {
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LOG_ERR("GPIO port for MDC pin is not ready");
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return -ENODEV;
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}
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if (!device_is_ready(dev_cfg->mdio_gpio.port)) {
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LOG_ERR("GPIO port for MDIO pin is not ready");
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return -ENODEV;
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}
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rc = gpio_pin_configure_dt(&dev_cfg->mdc_gpio, GPIO_OUTPUT_INACTIVE);
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if (rc < 0) {
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LOG_ERR("Couldn't configure MDC pin; (%d)", rc);
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return rc;
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}
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rc = gpio_pin_configure_dt(&dev_cfg->mdio_gpio, GPIO_INPUT);
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if (rc < 0) {
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LOG_ERR("Couldn't configure MDIO pin; (%d)", rc);
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return rc;
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}
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return 0;
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}
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static void mdio_gpio_bus_enable(const struct device *dev)
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{
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ARG_UNUSED(dev);
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}
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static void mdio_gpio_bus_disable(const struct device *dev)
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{
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ARG_UNUSED(dev);
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}
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static const struct mdio_driver_api mdio_gpio_driver_api = {
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.read = mdio_gpio_read_mmi,
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.write = mdio_gpio_write_mmi,
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.bus_enable = mdio_gpio_bus_enable,
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.bus_disable = mdio_gpio_bus_disable,
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};
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#define MDIO_GPIO_CONFIG(inst) \
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static struct mdio_gpio_config mdio_gpio_dev_config_##inst = { \
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.mdc_gpio = GPIO_DT_SPEC_INST_GET(inst, mdc_gpios), \
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.mdio_gpio = GPIO_DT_SPEC_INST_GET(inst, mdio_gpios), \
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};
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#define MDIO_GPIO_DEVICE(inst) \
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MDIO_GPIO_CONFIG(inst); \
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static struct mdio_gpio_data mdio_gpio_dev_data_##inst; \
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DEVICE_DT_INST_DEFINE(inst, &mdio_gpio_initialize, NULL, &mdio_gpio_dev_data_##inst, \
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&mdio_gpio_dev_config_##inst, POST_KERNEL, \
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CONFIG_MDIO_INIT_PRIORITY, &mdio_gpio_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(MDIO_GPIO_DEVICE)
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