114 lines
2.2 KiB
ArmAsm
114 lines
2.2 KiB
ArmAsm
/*
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* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
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* Contributors: 2018 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/toolchain.h>
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#include <zephyr/linker/sections.h>
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#include <zephyr/arch/cpu.h>
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#include <offsets.h>
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#include "asm_macros.inc"
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/* exports */
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GTEXT(__initialize)
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GTEXT(__reset)
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/* imports */
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GTEXT(_PrepC)
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GTEXT(riscv_cpu_wake_flag)
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GTEXT(riscv_cpu_sp)
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GTEXT(z_riscv_secondary_cpu_init)
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#if CONFIG_INCLUDE_RESET_VECTOR
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SECTION_FUNC(reset, __reset)
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/*
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* jump to __initialize
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* use call opcode in case __initialize is far away.
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* This will be dependent on linker.ld configuration.
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*/
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call __initialize
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#endif /* CONFIG_INCLUDE_RESET_VECTOR */
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/* use ABI name of registers for the sake of simplicity */
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/*
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* Remainder of asm-land initialization code before we can jump into
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* the C domain
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*/
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SECTION_FUNC(TEXT, __initialize)
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csrr a0, mhartid
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li t0, CONFIG_RV_BOOT_HART
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beq a0, t0, boot_first_core
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j boot_secondary_core
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boot_first_core:
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#ifdef CONFIG_FPU
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/*
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* Enable floating-point.
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*/
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li t0, MSTATUS_FS_INIT
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csrs mstatus, t0
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/*
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* Floating-point rounding mode set to IEEE-754 default, and clear
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* all exception flags.
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*/
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fscsr zero
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#endif
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#ifdef CONFIG_INIT_STACKS
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/* Pre-populate all bytes in z_interrupt_stacks with 0xAA */
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la t0, z_interrupt_stacks
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li t1, __z_interrupt_stack_SIZEOF
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add t1, t1, t0
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/* Populate z_interrupt_stacks with 0xaaaaaaaa */
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li t2, 0xaaaaaaaa
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aa_loop:
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sw t2, 0x00(t0)
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addi t0, t0, 4
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blt t0, t1, aa_loop
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#endif
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/*
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* Initially, setup stack pointer to
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* z_interrupt_stacks + __z_interrupt_stack_SIZEOF
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*/
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la sp, z_interrupt_stacks
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li t0, __z_interrupt_stack_SIZEOF
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add sp, sp, t0
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#ifdef CONFIG_WDOG_INIT
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call _WdogInit
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#endif
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/*
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* Jump into C domain. _PrepC zeroes BSS, copies rw data into RAM,
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* and then enters kernel z_cstart
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*/
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call _PrepC
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boot_secondary_core:
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#if CONFIG_MP_MAX_NUM_CPUS > 1
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la t0, riscv_cpu_wake_flag
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lr t0, 0(t0)
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bne a0, t0, boot_secondary_core
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/* Set up stack */
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la t0, riscv_cpu_sp
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lr sp, 0(t0)
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la t0, riscv_cpu_wake_flag
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sr zero, 0(t0)
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j z_riscv_secondary_cpu_init
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#else
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j loop_unconfigured_cores
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#endif
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loop_unconfigured_cores:
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wfi
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j loop_unconfigured_cores
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