145 lines
2.8 KiB
C
145 lines
2.8 KiB
C
/* Intel x86 GCC specific kernel inline assembler functions and macros */
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/*
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* Copyright (c) 2015, Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_ARCH_X86_INCLUDE_ASM_INLINE_GCC_H_
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#define ZEPHYR_ARCH_X86_INCLUDE_ASM_INLINE_GCC_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* The file must not be included directly
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* Include asm_inline.h instead
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*/
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#ifndef _ASMLANGUAGE
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/**
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*
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* @brief Return the current value of the EFLAGS register
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*
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* @return the EFLAGS register.
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*/
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static inline unsigned int EflagsGet(void)
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{
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unsigned int eflags; /* EFLAGS register contents */
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__asm__ volatile(
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"pushfl;\n\t"
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"popl %0;\n\t"
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: "=r"(eflags)
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: );
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return eflags;
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}
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#ifdef CONFIG_FP_SHARING
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/**
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*
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* @brief Disallow use of floating point capabilities
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*
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* This routine sets CR0[TS] to 1, which disallows the use of FP instructions
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* by the currently executing thread.
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*
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* @return N/A
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*/
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static inline void _FpAccessDisable(void)
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{
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void *tempReg;
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__asm__ volatile(
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"movl %%cr0, %0;\n\t"
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"orl $0x8, %0;\n\t"
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"movl %0, %%cr0;\n\t"
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: "=r"(tempReg)
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:
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: "memory");
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}
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/**
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*
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* @brief Save non-integer context information
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*
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* This routine saves the system's "live" non-integer context into the
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* specified area. If the specified thread supports SSE then
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* x87/MMX/SSEx thread info is saved, otherwise only x87/MMX thread is saved.
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* Function is invoked by _FpCtxSave(struct tcs *tcs)
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*
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* @return N/A
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*/
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static inline void _do_fp_regs_save(void *preemp_float_reg)
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{
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__asm__ volatile("fnsave (%0);\n\t"
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:
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: "r"(preemp_float_reg)
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: "memory");
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}
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#ifdef CONFIG_SSE
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/**
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*
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* @brief Save non-integer context information
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*
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* This routine saves the system's "live" non-integer context into the
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* specified area. If the specified thread supports SSE then
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* x87/MMX/SSEx thread info is saved, otherwise only x87/MMX thread is saved.
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* Function is invoked by _FpCtxSave(struct tcs *tcs)
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*
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* @return N/A
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*/
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static inline void _do_fp_and_sse_regs_save(void *preemp_float_reg)
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{
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__asm__ volatile("fxsave (%0);\n\t"
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:
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: "r"(preemp_float_reg)
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: "memory");
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}
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#endif /* CONFIG_SSE */
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/**
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*
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* @brief Initialize floating point register context information.
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*
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* This routine initializes the system's "live" floating point registers.
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*
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* @return N/A
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*/
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static inline void _do_fp_regs_init(void)
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{
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__asm__ volatile("fninit\n\t");
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}
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#ifdef CONFIG_SSE
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/**
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*
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* @brief Initialize SSE register context information.
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*
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* This routine initializes the system's "live" SSE registers.
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*
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* @return N/A
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*/
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static inline void _do_sse_regs_init(void)
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{
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__asm__ volatile("ldmxcsr _sse_mxcsr_default_value\n\t");
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}
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#endif /* CONFIG_SSE */
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#endif /* CONFIG_FP_SHARING */
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#endif /* _ASMLANGUAGE */
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#ifdef __cplusplus
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}
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#endif
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#endif /* ZEPHYR_ARCH_X86_INCLUDE_ASM_INLINE_GCC_H_ */
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