462 lines
11 KiB
C
462 lines
11 KiB
C
/*
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* Copyright (c) 2018 Diego Sueiro, <diego.sueiro@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <errno.h>
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#include <drivers/i2c.h>
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#include <soc.h>
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#include <i2c_imx.h>
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#include <sys/util.h>
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#include <logging/log.h>
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LOG_MODULE_REGISTER(i2c_imx);
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#include "i2c-priv.h"
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#define DEV_CFG(dev) \
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((const struct i2c_imx_config * const)(dev)->config->config_info)
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#define DEV_DATA(dev) \
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((struct i2c_imx_data * const)(dev)->driver_data)
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#define DEV_BASE(dev) \
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((I2C_Type *)(DEV_CFG(dev))->base)
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struct i2c_imx_config {
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I2C_Type *base;
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void (*irq_config_func)(struct device *dev);
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u32_t bitrate;
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};
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struct i2c_master_transfer {
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const u8_t *txBuff;
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volatile u8_t *rxBuff;
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volatile u32_t cmdSize;
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volatile u32_t txSize;
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volatile u32_t rxSize;
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volatile bool isBusy;
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volatile u32_t currentDir;
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volatile u32_t currentMode;
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volatile bool ack;
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};
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struct i2c_imx_data {
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struct i2c_master_transfer transfer;
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struct k_sem device_sync_sem;
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};
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static bool i2c_imx_write(struct device *dev, u8_t *txBuffer, u8_t txSize)
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{
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I2C_Type *base = DEV_BASE(dev);
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struct i2c_imx_data *data = DEV_DATA(dev);
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struct i2c_master_transfer *transfer = &data->transfer;
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transfer->isBusy = true;
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/* Clear I2C interrupt flag to avoid spurious interrupt */
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I2C_ClearStatusFlag(base, i2cStatusInterrupt);
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/* Set I2C work under Tx mode */
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I2C_SetDirMode(base, i2cDirectionTransmit);
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transfer->currentDir = i2cDirectionTransmit;
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transfer->txBuff = txBuffer;
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transfer->txSize = txSize;
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I2C_WriteByte(base, *transfer->txBuff);
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transfer->txBuff++;
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transfer->txSize--;
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/* Enable I2C interrupt, subsequent data transfer will be handled
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* in ISR.
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*/
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I2C_SetIntCmd(base, true);
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/* Wait for the transfer to complete */
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k_sem_take(&data->device_sync_sem, K_FOREVER);
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return transfer->ack;
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}
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static void i2c_imx_read(struct device *dev, u8_t *rxBuffer, u8_t rxSize)
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{
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I2C_Type *base = DEV_BASE(dev);
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struct i2c_imx_data *data = DEV_DATA(dev);
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struct i2c_master_transfer *transfer = &data->transfer;
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transfer->isBusy = true;
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/* Clear I2C interrupt flag to avoid spurious interrupt */
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I2C_ClearStatusFlag(base, i2cStatusInterrupt);
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/* Change to receive state. */
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I2C_SetDirMode(base, i2cDirectionReceive);
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transfer->currentDir = i2cDirectionReceive;
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transfer->rxBuff = rxBuffer;
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transfer->rxSize = rxSize;
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if (transfer->rxSize == 1U) {
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/* Send Nack */
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I2C_SetAckBit(base, false);
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} else {
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/* Send Ack */
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I2C_SetAckBit(base, true);
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}
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/* dummy read to clock in 1st byte */
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I2C_ReadByte(base);
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/* Enable I2C interrupt, subsequent data transfer will be handled
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* in ISR.
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*/
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I2C_SetIntCmd(base, true);
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/* Wait for the transfer to complete */
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k_sem_take(&data->device_sync_sem, K_FOREVER);
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}
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static int i2c_imx_configure(struct device *dev, u32_t dev_config_raw)
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{
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I2C_Type *base = DEV_BASE(dev);
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struct i2c_imx_data *data = DEV_DATA(dev);
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struct i2c_master_transfer *transfer = &data->transfer;
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u32_t baudrate;
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if (!(I2C_MODE_MASTER & dev_config_raw)) {
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return -EINVAL;
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}
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if (I2C_ADDR_10_BITS & dev_config_raw) {
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return -EINVAL;
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}
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/* Initialize I2C state structure content. */
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transfer->txBuff = 0;
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transfer->rxBuff = 0;
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transfer->cmdSize = 0U;
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transfer->txSize = 0U;
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transfer->rxSize = 0U;
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transfer->isBusy = false;
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transfer->currentDir = i2cDirectionReceive;
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transfer->currentMode = i2cModeSlave;
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switch (I2C_SPEED_GET(dev_config_raw)) {
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case I2C_SPEED_STANDARD:
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baudrate = KHZ(100);
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break;
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case I2C_SPEED_FAST:
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baudrate = MHZ(1);
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break;
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default:
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return -EINVAL;
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}
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/* Setup I2C init structure. */
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i2c_init_config_t i2cInitConfig = {
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.baudRate = baudrate,
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.slaveAddress = 0x00
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};
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i2cInitConfig.clockRate = get_i2c_clock_freq(base);
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I2C_Init(base, &i2cInitConfig);
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I2C_Enable(base);
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return 0;
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}
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static int i2c_imx_send_addr(struct device *dev, u16_t addr, u8_t flags)
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{
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u8_t byte0 = addr << 1;
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byte0 |= (flags & I2C_MSG_RW_MASK) == I2C_MSG_READ;
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return i2c_imx_write(dev, &byte0, 1);
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}
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static int i2c_imx_transfer(struct device *dev, struct i2c_msg *msgs,
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u8_t num_msgs, u16_t addr)
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{
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I2C_Type *base = DEV_BASE(dev);
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struct i2c_imx_data *data = DEV_DATA(dev);
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struct i2c_master_transfer *transfer = &data->transfer;
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u8_t *buf, *buf_end;
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u16_t timeout = UINT16_MAX;
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int result = -EIO;
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if (!num_msgs) {
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return 0;
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}
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/* Wait until bus not busy */
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while ((I2C_I2SR_REG(base) & i2cStatusBusBusy) && (--timeout)) {
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}
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if (timeout == 0U) {
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return result;
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}
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/* Make sure we're in a good state so slave recognises the Start */
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I2C_SetWorkMode(base, i2cModeSlave);
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transfer->currentMode = i2cModeSlave;
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/* Switch back to Rx direction. */
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I2C_SetDirMode(base, i2cDirectionReceive);
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transfer->currentDir = i2cDirectionReceive;
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/* Start condition */
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I2C_SetDirMode(base, i2cDirectionTransmit);
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transfer->currentDir = i2cDirectionTransmit;
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I2C_SetWorkMode(base, i2cModeMaster);
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transfer->currentMode = i2cModeMaster;
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/* Send address after any Start condition */
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if (!i2c_imx_send_addr(dev, addr, msgs->flags)) {
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goto finish; /* No ACK received */
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}
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do {
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if (msgs->flags & I2C_MSG_RESTART) {
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I2C_SendRepeatStart(base);
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if (!i2c_imx_send_addr(dev, addr, msgs->flags)) {
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goto finish; /* No ACK received */
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}
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}
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/* Transfer data */
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buf = msgs->buf;
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buf_end = buf + msgs->len;
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if ((msgs->flags & I2C_MSG_RW_MASK) == I2C_MSG_READ) {
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i2c_imx_read(dev, msgs->buf, msgs->len);
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} else {
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if (!i2c_imx_write(dev, msgs->buf, msgs->len)) {
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goto finish; /* No ACK received */
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}
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}
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if (msgs->flags & I2C_MSG_STOP) {
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I2C_SetWorkMode(base, i2cModeSlave);
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transfer->currentMode = i2cModeSlave;
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I2C_SetDirMode(base, i2cDirectionReceive);
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transfer->currentDir = i2cDirectionReceive;
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}
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/* Next message */
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msgs++;
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num_msgs--;
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} while (num_msgs);
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/* Complete without error */
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result = 0;
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return result;
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finish:
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I2C_SetWorkMode(base, i2cModeSlave);
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transfer->currentMode = i2cModeSlave;
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I2C_SetDirMode(base, i2cDirectionReceive);
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transfer->currentDir = i2cDirectionReceive;
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return result;
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}
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static void i2c_imx_isr(void *arg)
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{
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struct device *dev = (struct device *)arg;
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I2C_Type *base = DEV_BASE(dev);
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struct i2c_imx_data *data = DEV_DATA(dev);
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struct i2c_master_transfer *transfer = &data->transfer;
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/* Clear interrupt flag. */
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I2C_ClearStatusFlag(base, i2cStatusInterrupt);
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/* Exit the ISR if no transfer is happening for this instance. */
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if (!transfer->isBusy) {
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return;
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}
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if (i2cModeMaster == transfer->currentMode) {
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if (i2cDirectionTransmit == transfer->currentDir) {
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/* Normal write operation. */
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transfer->ack =
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!(I2C_GetStatusFlag(base, i2cStatusReceivedAck));
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if (transfer->txSize == 0U) {
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/* Close I2C interrupt. */
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I2C_SetIntCmd(base, false);
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/* Release I2C Bus. */
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transfer->isBusy = false;
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k_sem_give(&data->device_sync_sem);
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} else {
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I2C_WriteByte(base, *transfer->txBuff);
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transfer->txBuff++;
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transfer->txSize--;
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}
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} else {
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/* Normal read operation. */
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if (transfer->rxSize == 2U) {
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/* Send Nack */
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I2C_SetAckBit(base, false);
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} else {
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/* Send Ack */
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I2C_SetAckBit(base, true);
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}
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if (transfer->rxSize == 1U) {
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/* Switch back to Tx direction to avoid
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* additional I2C bus read.
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*/
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I2C_SetDirMode(base, i2cDirectionTransmit);
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transfer->currentDir = i2cDirectionTransmit;
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}
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*transfer->rxBuff = I2C_ReadByte(base);
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transfer->rxBuff++;
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transfer->rxSize--;
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/* receive finished. */
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if (transfer->rxSize == 0U) {
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/* Close I2C interrupt. */
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I2C_SetIntCmd(base, false);
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/* Release I2C Bus. */
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transfer->isBusy = false;
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k_sem_give(&data->device_sync_sem);
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}
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}
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}
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}
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static int i2c_imx_init(struct device *dev)
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{
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const struct i2c_imx_config *config = DEV_CFG(dev);
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struct i2c_imx_data *data = DEV_DATA(dev);
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u32_t bitrate_cfg;
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int error;
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k_sem_init(&data->device_sync_sem, 0, UINT_MAX);
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bitrate_cfg = i2c_map_dt_bitrate(config->bitrate);
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error = i2c_imx_configure(dev, I2C_MODE_MASTER | bitrate_cfg);
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if (error) {
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return error;
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}
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config->irq_config_func(dev);
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return 0;
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}
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static const struct i2c_driver_api i2c_imx_driver_api = {
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.configure = i2c_imx_configure,
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.transfer = i2c_imx_transfer,
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};
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#ifdef CONFIG_I2C_1
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static void i2c_imx_config_func_1(struct device *dev);
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static const struct i2c_imx_config i2c_imx_config_1 = {
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.base = (I2C_Type *)DT_FSL_IMX7D_I2C_I2C_1_BASE_ADDRESS,
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.irq_config_func = i2c_imx_config_func_1,
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.bitrate = DT_FSL_IMX7D_I2C_I2C_1_CLOCK_FREQUENCY,
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};
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static struct i2c_imx_data i2c_imx_data_1;
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DEVICE_AND_API_INIT(i2c_imx_1, DT_FSL_IMX7D_I2C_I2C_1_LABEL, &i2c_imx_init,
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&i2c_imx_data_1, &i2c_imx_config_1,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&i2c_imx_driver_api);
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static void i2c_imx_config_func_1(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_1_IRQ_0, DT_FSL_IMX7D_I2C_I2C_1_IRQ_0_PRIORITY,
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i2c_imx_isr, DEVICE_GET(i2c_imx_1), 0);
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irq_enable(DT_FSL_IMX7D_I2C_I2C_1_IRQ_0);
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}
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#endif /* CONFIG_I2C_1 */
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#ifdef CONFIG_I2C_2
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static void i2c_imx_config_func_2(struct device *dev);
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static const struct i2c_imx_config i2c_imx_config_2 = {
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.base = (I2C_Type *)DT_FSL_IMX7D_I2C_I2C_2_BASE_ADDRESS,
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.irq_config_func = i2c_imx_config_func_2,
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.bitrate = DT_FSL_IMX7D_I2C_I2C_2_CLOCK_FREQUENCY,
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};
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static struct i2c_imx_data i2c_imx_data_2;
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DEVICE_AND_API_INIT(i2c_imx_2, DT_FSL_IMX7D_I2C_I2C_2_LABEL, &i2c_imx_init,
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&i2c_imx_data_2, &i2c_imx_config_2,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&i2c_imx_driver_api);
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static void i2c_imx_config_func_2(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_2_IRQ_0, DT_FSL_IMX7D_I2C_I2C_2_IRQ_0_PRIORITY,
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i2c_imx_isr, DEVICE_GET(i2c_imx_2), 0);
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irq_enable(DT_FSL_IMX7D_I2C_I2C_2_IRQ_0);
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}
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#endif /* CONFIG_I2C_2 */
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#ifdef CONFIG_I2C_3
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static void i2c_imx_config_func_3(struct device *dev);
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static const struct i2c_imx_config i2c_imx_config_3 = {
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.base = (I2C_Type *)DT_FSL_IMX7D_I2C_I2C_3_BASE_ADDRESS,
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.irq_config_func = i2c_imx_config_func_3,
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.bitrate = DT_FSL_IMX7D_I2C_I2C_3_CLOCK_FREQUENCY,
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};
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static struct i2c_imx_data i2c_imx_data_3;
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DEVICE_AND_API_INIT(i2c_imx_3, DT_FSL_IMX7D_I2C_I2C_3_LABEL, &i2c_imx_init,
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&i2c_imx_data_3, &i2c_imx_config_3,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&i2c_imx_driver_api);
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static void i2c_imx_config_func_3(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_3_IRQ_0, DT_FSL_IMX7D_I2C_I2C_3_IRQ_0_PRIORITY,
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i2c_imx_isr, DEVICE_GET(i2c_imx_3), 0);
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irq_enable(DT_FSL_IMX7D_I2C_I2C_3_IRQ_0);
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}
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#endif /* CONFIG_I2C_3 */
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#ifdef CONFIG_I2C_4
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static void i2c_imx_config_func_4(struct device *dev);
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static const struct i2c_imx_config i2c_imx_config_4 = {
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.base = (I2C_Type *)DT_FSL_IMX7D_I2C_I2C_4_BASE_ADDRESS,
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.irq_config_func = i2c_imx_config_func_4,
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.bitrate = DT_FSL_IMX7D_I2C_I2C_4_CLOCK_FREQUENCY,
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};
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static struct i2c_imx_data i2c_imx_data_4;
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DEVICE_AND_API_INIT(i2c_imx_4, DT_FSL_IMX7D_I2C_I2C_4_LABEL, &i2c_imx_init,
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&i2c_imx_data_4, &i2c_imx_config_4,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&i2c_imx_driver_api);
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static void i2c_imx_config_func_4(struct device *dev)
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{
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ARG_UNUSED(dev);
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IRQ_CONNECT(DT_FSL_IMX7D_I2C_I2C_4_IRQ_0, DT_FSL_IMX7D_I2C_I2C_4_IRQ_0_PRIORITY,
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i2c_imx_isr, DEVICE_GET(i2c_imx_4), 0);
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irq_enable(DT_FSL_IMX7D_I2C_I2C_4_IRQ_0);
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}
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#endif /* CONFIG_I2C_4 */
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