613 lines
16 KiB
Plaintext
613 lines
16 KiB
Plaintext
# Kconfig - PWM configuration options
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#
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# Copyright (c) 2015 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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menuconfig PWM
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bool "PWM (Pulse Width Modulation) Drivers"
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default n
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help
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Enable config options for PWM drivers.
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################################################
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# PCA9685
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################################################
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config PWM_PCA9685
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bool "PCA9685 I2C-based PWM chip"
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depends on PWM && I2C
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default n
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help
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Enable driver for PCA9685 I2C-based PWM chip.
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config PWM_PCA9685_INIT_PRIORITY
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int
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depends on PWM_PCA9685
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default 70
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prompt "Init priority"
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help
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Device driver initialization priority.
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config PWM_PCA9685_0
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bool "PCA9685 PWM chip #0"
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depends on PWM_PCA9685
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default n
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help
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Enable config options for the PCA9685 I2C-based PWM chip #0.
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config PWM_PCA9685_0_DEV_NAME
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string "PCA9685 PWM chip #0 Device Name"
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depends on PWM_PCA9685_0
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default "PWM_P0"
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help
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Specify the device name for the PCA9685 I2C-based PWM chip #0.
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config PWM_PCA9685_0_I2C_ADDR
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hex "PCA9685 PWM chip #0 I2C slave address"
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depends on PWM_PCA9685_0
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default 0x0
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help
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Specify the I2C slave address for the PCA9685 I2C-based PWM chip #0.
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config PWM_PCA9685_0_I2C_MASTER_DEV_NAME
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string "I2C Master where PCA9685 PWM chip #0 is connected"
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depends on PWM_PCA9685_0
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default ""
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help
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Specify the device name of the I2C master device to which this
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PCA9685 chip #0 is binded.
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config PWM_QMSI
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bool "QMSI PWM Driver"
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depends on QMSI_DRIVERS && PWM
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default n
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help
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Enable QMSI PWM driver. This driver will use the QMSI library to
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access the SOC underlying timer IP block. This driver uses the
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DesignWare IP block that can be also handled by the PWM_DW driver
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config PWM_QMSI_DEV_NAME
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string "QMSI PWM Device Name"
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depends on PWM_QMSI
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default "PWM"
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help
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Specify the device name for the PWM driver.
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config PWM_QMSI_NUM_PORTS
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int "Number of PWM ports for PWM"
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depends on PWM_QMSI
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default 1
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help
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Specify how many PWM ports on the IP block.
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config PWM_DW
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bool "DesignWare PWM"
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depends on PWM
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default n
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help
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Enable driver to utilize PWM on the DesignWare Timer IP block.
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Care must be taken if one is also to use the timer feature, as
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they both use the same set of registers.
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config PWM_DW_DEV_NAME
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string "DesignWare PWM Device Name"
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depends on PWM_DW
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default "PWM_DW"
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help
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Specify the device name for the DesignWare PWM driver.
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config PWM_DW_BASE_ADDR
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hex "DesignWare PWM Base Address"
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depends on PWM_DW
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help
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Specify the base address for registers for DesignWare PWM.
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config PWM_DW_NUM_PORTS
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int "Number of PWM ports for DesignWare PWM"
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depends on PWM_DW
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default 1
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help
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Specify how many PWM ports on the IP block.
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Default is 1.
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################################################
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# K64 Flex Timer Module (FTM)
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################################################
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config PWM_K64_FTM
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bool "PWM with Freescale K64 Flex Timer Module (FTM)"
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depends on PWM
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default n
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help
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Enable Pulse Width Modulation driver for Freescale
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K64 Flex Timer Module (FTM).
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config PWM_K64_FTM_DEBUG
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bool "Enable Debugging for pwm_ftm driver"
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depends on PWM_K64_FTM
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default n
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help
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Enable debugging for pwm_ftm driver.
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#### FTM0 #####
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config PWM_K64_FTM_0
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bool "K64 FTM PWM Module 0"
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depends on PWM_K64_FTM
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default n
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help
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Enable config PWM options for FTM0 source module.
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config PWM_K64_FTM_0_DEV_NAME
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string "K64 FTM PWM Module 0 Device Name"
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depends on PWM_K64_FTM_0
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default "PWM_K64_FTM0"
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help
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Specify the device name for the FTM0 source module.
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config PWM_K64_FTM_0_REG_BASE
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hex "K64 FTM0 Register Base Address"
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depends on PWM_K64_FTM_0
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default 0x40038000
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help
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Specify the memory mapped base address of FTM0. This is the address
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of FTM0_SC which is the first register of the module
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config PWM_K64_FTM_0_PRESCALE
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int "K64 FTM0 prescale value"
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default 1
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depends on PWM_K64_FTM_0
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help
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Specify the FTM timer prescale value. The valid values are
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1, 2, 4, 8, 16, 32, 64, or 128.
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config PWM_K64_FTM_0_PERIOD
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int "K64 FTM0 period value"
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default 65535
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depends on PWM_K64_FTM_0
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help
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Specify the FTM0 PWM period in ticks
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menu "K64 FTM0 Clock Source"
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depends on PWM_K64_FTM_0
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choice PWM_K64_FTM_0_CLOCK_SOURCE_CHOICE
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prompt "Choose the K64 FTM0 clock source"
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default PWM_K64_FTM_0_CLOCK_SOURCE_SYSTEM
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config PWM_K64_FTM_0_CLOCK_SOURCE_NONE
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bool "No clock selected (FTM counter disable)"
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config PWM_K64_FTM_0_CLOCK_SOURCE_SYSTEM
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bool "System clock"
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config PWM_K64_FTM_0_CLOCK_SOURCE_FIXED
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bool "Fixed Frequency Clock"
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config PWM_K64_FTM_0_CLOCK_SOURCE_EXTERNAL
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bool "External Clock"
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config PWM_K64_FTM_0_CLOCK_SOURCE_QUAD
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bool "Quadrature Decoder"
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endchoice
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endmenu
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config PWM_K64_FTM_0_CLOCK_SOURCE
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int
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# Omit prompt to signify "hidden" option
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depends on PWM_K64_FTM_0
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default 0 if PWM_K64_FTM_0_CLOCK_SOURCE_NONE
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default 1 if PWM_K64_FTM_0_CLOCK_SOURCE_SYSTEM
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default 2 if PWM_K64_FTM_0_CLOCK_SOURCE_FIXED
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default 3 if PWM_K64_FTM_0_CLOCK_SOURCE_EXTERNAL
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default 4 if PWM_K64_FTM_0_CLOCK_SOURCE_QUAD
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help
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Specify K64 FTM0 clock source
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config PWM_K64_FTM_0_PHASE_ENABLE_0
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bool "FTM0 Enable Phase for channel 0"
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depends on PWM_K64_FTM_0
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default n
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help
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Allow a phase offset on FTM0 channel 0. This configures
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channels 0 and 1 to be in combine mode therefore
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channel 1 is not valid as an output signal.
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Note: phase is an unsupported feature.
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config PWM_K64_FTM_0_PHASE_ENABLE_2
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bool "FTM0 Enable Phase for channel 2"
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depends on PWM_K64_FTM_0
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default n
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help
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Allow a phase offset on FTM0 channel 2. This configures
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channels 2 and 3 to be in combine mode therefore
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channel 3 is not valid as an output signal.
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Note: phase is an unsupported feature.
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config PWM_K64_FTM_0_PHASE_ENABLE_4
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bool "FTM0 Enable Phase for channel 4"
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depends on PWM_K64_FTM_0
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default n
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help
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Allow a phase offset on FTM0 channel 4. This configures
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channels 4 and 5 to be in combine mode therefore
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channel 5 is not valid as an output signal.
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Note: phase is an unsupported feature.
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config PWM_K64_FTM_0_PHASE_ENABLE_6
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bool "FTM0 Enable Phase for channel 6"
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depends on PWM_K64_FTM_0
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default n
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help
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Allow a phase offset on FTM0 channel 6. This configures
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channels 6 and 7 to be in combine mode therefore
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channel 7 is not valid as an output signal.
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Note: phase is an unsupported feature.
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#### FTM1 #####
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config PWM_K64_FTM_1
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bool "K64 FTM PWM Module 1"
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depends on PWM_K64_FTM
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default n
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help
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Enable config PWM options for FTM1 source module.
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config PWM_K64_FTM_1_DEV_NAME
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string "K64 FTM PWM Module 1 Device Name"
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depends on PWM_K64_FTM_1
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default "PWM_K64_FTM1"
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help
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Specify the device name for the FTM1 source module.
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config PWM_K64_FTM_1_REG_BASE
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hex "K64 FTM1 Register Base Address"
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depends on PWM_K64_FTM_1
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default 0x40039000
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help
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Specify the memory mapped base address of FTM1. This is the address
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of FTM1_SC which is the first register of the module
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config PWM_K64_FTM_1_PRESCALE
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int "FTM1 prescale value"
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default 1
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depends on PWM_K64_FTM_1
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help
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Specify the FTM1 timer prescale value. The valid values are
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1, 2, 4, 8, 16, 32, 64, or 128
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config PWM_K64_FTM_1_PERIOD
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int "FTM1 period value"
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default 65535
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depends on PWM_K64_FTM_1
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help
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Specify the FTM1 PWM period in ticks
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menu "K64 FTM1 Clock Source"
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depends on PWM_K64_FTM_1
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choice PWM_K64_FTM_1_CLOCK_SOURCE_CHOICE
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prompt "Choose the FTM1 clock source"
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default PWM_K64_FTM_1_CLOCK_SOURCE_SYSTEM
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config PWM_K64_FTM_1_CLOCK_SOURCE_NONE
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bool "No clock selected (FTM counter disable)"
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config PWM_K64_FTM_1_CLOCK_SOURCE_SYSTEM
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bool "System clock"
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config PWM_K64_FTM_1_CLOCK_SOURCE_FIXED
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bool "Fixed Frequency Clock"
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config PWM_K64_FTM_1_CLOCK_SOURCE_EXTERNAL
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bool "External Clock"
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config PWM_K64_FTM_1_CLOCK_SOURCE_QUAD
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bool "Quadrature Decoder"
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endchoice
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endmenu
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config PWM_K64_FTM_1_CLOCK_SOURCE
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int
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# Omit prompt to signify "hidden" option
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depends on PWM_K64_FTM_1
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default 0 if PWM_K64_FTM_1_CLOCK_SOURCE_NONE
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default 1 if PWM_K64_FTM_1_CLOCK_SOURCE_SYSTEM
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default 2 if PWM_K64_FTM_1_CLOCK_SOURCE_FIXED
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default 3 if PWM_K64_FTM_1_CLOCK_SOURCE_EXTERNAL
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default 4 if PWM_K64_FTM_1_CLOCK_SOURCE_QUAD
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help
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Specify K64 FTM1 clock source
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config PWM_K64_FTM_1_PHASE_ENABLE_0
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bool "FTM1 Enable Phase for channel 0"
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depends on PWM_K64_FTM_1
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default n
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help
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Allow a phase offset on FTM1 channel 0. This configures
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channels 0 and 1 to be in combine mode therefore
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channel 1 is not valid as an output signal.
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Note: phase is an unsupported feature.
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config PWM_FTM_1_PHASE_ENABLE_2
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bool "FTM1 Enable Phase for channel 2"
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depends on PWM_K64_FTM_1
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default n
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help
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Allow a phase offset on FTM1 channel 2. This configures
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channels 2 and 3 to be in combine mode therefore
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channel 3 is not valid as an output signal.
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Note: phase is an unsupported feature.
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config PWM_FTM_1_PHASE_ENABLE_4
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bool "FTM1 Enable Phase for channel 4"
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depends on PWM_K64_FTM_1
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default n
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help
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Allow a phase offset on FTM1 channel 4. This configures
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channels 4 and 5 to be in combine mode therefore
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channel 5 is not valid as an output signal.
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Note: phase is an unsupported feature.
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config PWM_FTM_1_PHASE_ENABLE_6
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bool "FTM1 Enable Phase for channel 6"
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depends on PWM_K64_FTM_1
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default n
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help
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Allow a phase offset on FTM1 channel 6. This configures
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channels 6 and 7 to be in combine mode therefore
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channel 7 is not valid as an output signal.
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Note: phase is an unsupported feature.
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#### FTM2 #####
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config PWM_K64_FTM_2
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bool "K64 FTM PWM Module 2"
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depends on PWM_K64_FTM
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default n
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help
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Enable config PWM options for FTM2 source module.
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config PWM_K64_FTM_2_DEV_NAME
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string "K64 FTM PWM Module 2 Device Name"
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depends on PWM_K64_FTM_2
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default "PWM_K64_FTM2"
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help
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Specify the device name for the FTM2 source module.
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config PWM_K64_FTM_2_REG_BASE
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hex "K64 FTM2 Register Base Address"
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depends on PWM_K64_FTM_2
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default 0x4003A000
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help
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Specify the memory mapped base address of FTM2. This is the address
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of FTM2_SC which is the first register of the module
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config PWM_K64_FTM_2_PRESCALE
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int "FTM2 prescale value"
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default 1
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depends on PWM_K64_FTM_2
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help
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Specify the FTM2 timer prescale value. The valid values are
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1, 2, 4, 8, 16, 32, 64, or 128
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config PWM_K64_FTM_2_PERIOD
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int "FTM2 period value"
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default 65535
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depends on PWM_K64_FTM_2
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help
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Specify the FTM2 PWM period in ticks
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menu "K64 FTM2 Clock Source"
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depends on PWM_K64_FTM_2
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choice PWM_K64_FTM_2_CLOCK_SOURCE_CHOICE
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prompt "Choose the FTM2 clock source"
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default PWM_K64_FTM_2_CLOCK_SOURCE_SYSTEM
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config PWM_K64_FTM_2_CLOCK_SOURCE_NONE
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bool "No clock selected (FTM counter disable)"
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config PWM_K64_FTM_2_CLOCK_SOURCE_SYSTEM
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bool "System clock"
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config PWM_K64_FTM_2_CLOCK_SOURCE_FIXED
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bool "Fixed Frequency Clock"
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config PWM_K64_FTM_2_CLOCK_SOURCE_EXTERNAL
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bool "External Clock"
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config PWM_K64_FTM_2_CLOCK_SOURCE_QUAD
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bool "Quadrature Decoder"
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endchoice
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endmenu
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config PWM_K64_FTM_2_CLOCK_SOURCE
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int
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# Omit prompt to signify "hidden" option
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depends on PWM_K64_FTM_2
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default 0 if PWM_K64_FTM_2_CLOCK_SOURCE_NONE
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default 1 if PWM_K64_FTM_2_CLOCK_SOURCE_SYSTEM
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default 2 if PWM_K64_FTM_2_CLOCK_SOURCE_FIXED
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default 3 if PWM_K64_FTM_2_CLOCK_SOURCE_EXTERNAL
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default 4 if PWM_K64_FTM_2_CLOCK_SOURCE_QUAD
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help
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Specify K64 FTM2 clock source
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config PWM_K64_FTM_2_PHASE_ENABLE_0
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bool "FTM2 Enable Phase for channel 0"
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depends on PWM_K64_FTM_2
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default n
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help
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Allow a phase offset on FTM2 channel 0. This configures
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channels 0 and 1 to be in combine mode therefore
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channel 1 is not valid as an output signal.
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Note: phase is an unsupported feature.
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config PWM_K64_FTM_2_PHASE_ENABLE_2
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bool "FTM2 Enable Phase for channel 2"
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depends on PWM_K64_FTM_2
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default n
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help
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Allow a phase offset on FTM2 channel 2. This configures
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channels 2 and 3 to be in combine mode therefore
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channel 3 is not valid as an output signal.
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Note: phase is an unsupported feature.
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config PWM_K64_FTM_2_PHASE_ENABLE_4
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bool "FTM2 Enable Phase for channel 4"
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depends on PWM_K64_FTM_2
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default n
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help
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Allow a phase offset on FTM2 channel 4. This configures
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channels 4 and 5 to be in combine mode therefore
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channel 5 is not valid as an output signal.
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Note: phase is an unsupported feature.
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config PWM_K64_FTM_2_PHASE_ENABLE_6
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bool "FTM2 Enable Phase for channel 6"
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depends on PWM_K64_FTM_2
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default n
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help
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Allow a phase offset on FTM2 channel 6. This configures
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channels 6 and 7 to be in combine mode therefore
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channel 7 is not valid as an output signal.
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Note: phase is an unsupported feature.
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#### FTM3 #####
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config PWM_K64_FTM_3
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bool "K64 FTM PWM Module 3"
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depends on PWM_K64_FTM
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default n
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help
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Enable config PWM options for K64 FTM3 source module.
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config PWM_K64_FTM_3_DEV_NAME
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string "K64 FTM PWM Module 3 Device Name"
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depends on PWM_K64_FTM_3
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default "PWM_K64_FTM3"
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help
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Specify the device name for the FTM3 source module.
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config PWM_K64_FTM_3_REG_BASE
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hex "K64 FTM3 Register Base Address"
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depends on PWM_K64_FTM_3
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default 0x400B9000
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help
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Specify the memory mapped base address of FTM3. This is the address
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of FTM3_SC which is the first register of the module
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config PWM_K64_FTM_3_PRESCALE
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int "FTM3 prescale value"
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default 3
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depends on PWM_K64_FTM_3
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help
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Specify the FTM timer prescale value. The valid values are
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1, 2, 4, 8, 16, 32, 64, or 128
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config PWM_K64_FTM_3_PERIOD
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int "FTM3 period value"
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default 65535
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depends on PWM_K64_FTM_3
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help
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Specify the FTM3 PWM period in ticks
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menu "K64 FTM3 Clock Source"
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depends on PWM_K64_FTM_3
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choice PWM_K64_FTM_3_CLOCK_SOURCE_CHOICE
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prompt "Choose the FTM3 clock source"
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default PWM_K64_FTM_3_CLOCK_SOURCE_SYSTEM
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config PWM_K64_FTM_3_CLOCK_SOURCE_NONE
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bool "No clock selected (FTM counter disable)"
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config PWM_K64_FTM_3_CLOCK_SOURCE_SYSTEM
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bool "System clock"
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config PWM_K64_FTM_3_CLOCK_SOURCE_FIXED
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bool "Fixed Frequency Clock"
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config PWM_K64_FTM_3_CLOCK_SOURCE_EXTERNAL
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bool "External Clock"
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config PWM_K64_FTM_3_CLOCK_SOURCE_QUAD
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bool "Quadrature Decoder"
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endchoice
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endmenu
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config PWM_K64_FTM_3_CLOCK_SOURCE
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int
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# Omit prompt to signify "hidden" option
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|
depends on PWM_K64_FTM_3
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|
default 0 if PWM_K64_FTM_3_CLOCK_SOURCE_NONE
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default 1 if PWM_K64_FTM_3_CLOCK_SOURCE_SYSTEM
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default 2 if PWM_K64_FTM_3_CLOCK_SOURCE_FIXED
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default 3 if PWM_K64_FTM_3_CLOCK_SOURCE_EXTERNAL
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default 4 if PWM_K64_FTM_3_CLOCK_SOURCE_QUAD
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|
help
|
|
Specify K64 FTM3 clock source
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|
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config PWM_K64_FTM_3_PHASE_ENABLE_0
|
|
bool "FTM3 Enable Phase for channel 0"
|
|
depends on PWM_K64_FTM_3
|
|
default n
|
|
help
|
|
Allow a phase offset on FTM3 channel 0. This configures
|
|
channels 0 and 1 to be in combine mode therefore
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|
channel 1 is not valid as an output signal.
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|
Note: phase is an unsupported feature.
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|
|
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config PWM_K64_FTM_3_PHASE_ENABLE_2
|
|
bool "FTM3 Enable Phase for channel 2"
|
|
depends on PWM_K64_FTM_3
|
|
default n
|
|
help
|
|
Allow a phase offset on FTM3 channel 2. This configures
|
|
channels 2 and 3 to be in combine mode therefore
|
|
channel 3 is not valid as an output signal.
|
|
Note: phase is an unsupported feature.
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|
|
|
config PWM_K64_FTM_3_PHASE_ENABLE_4
|
|
bool "FTM3 Enable Phase for channel 4"
|
|
depends on PWM_K64_FTM_3
|
|
default n
|
|
help
|
|
Allow a phase offset on FTM3 channel 4. This configures
|
|
channels 4 and 5 to be in combine mode therefore
|
|
channel 5 is not valid as an output signal.
|
|
Note: phase is an unsupported feature.
|
|
|
|
config PWM_K64_FTM_3_PHASE_ENABLE_6
|
|
bool "FTM3 Enable Phase for channel 6"
|
|
depends on PWM_K64_FTM_3
|
|
default n
|
|
help
|
|
Allow a phase offset on FTM3 channel 6. This configures
|
|
channels 6 and 7 to be in combine mode therefore
|
|
channel 7 is not valid as an output signal.
|
|
Note: phase is an unsupported feature.
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