41 lines
520 B
Plaintext
41 lines
520 B
Plaintext
/*
|
|
* Copyright (c) 2019 Intel Corporation
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include <mem.h>
|
|
|
|
#define DT_DRAM_SIZE DT_SIZE_K(8192)
|
|
#define DT_DRAM_BASE 0
|
|
|
|
#include <intel/ia32.dtsi>
|
|
|
|
/ {
|
|
model = "ACRN";
|
|
compatible = "acrn";
|
|
|
|
aliases {
|
|
uart-0 = &uart0;
|
|
uart-1 = &uart1;
|
|
};
|
|
|
|
chosen {
|
|
zephyr,sram = &dram0;
|
|
zephyr,console = &uart0;
|
|
zephyr,shell-uart = &uart0;
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
status = "okay";
|
|
current-speed = <115200>;
|
|
};
|
|
|
|
&uart1 {
|
|
status = "okay";
|
|
current-speed = <115200>;
|
|
};
|