zephyr/boards/riscv
Johan Hedberg 1afc0a16c5 boards: riscv: Use HEAP_MEM_POOL_ADD_SIZE KConfig options
Kconfig options with a HEAP_MEM_POOL_ADD_SIZE_ prefix should be used to
set the minimum required system heap size. This helps prevent
applications from creating a non-working image by trying to set a too
small value.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2023-12-20 11:01:42 +01:00
..
adp_xc7k_ae350 boards: riscv: adp_xc7k_ae350: doc: index.rst 2023-11-10 10:42:04 +01:00
beaglev_fire boards: riscv: introduce support for Beagleboard BeagleV-Fire 2023-12-15 14:39:19 +01:00
esp32c3_devkitm boards: riscv: Use HEAP_MEM_POOL_ADD_SIZE KConfig options 2023-12-20 11:01:42 +01:00
esp32c3_luatos_core boards: riscv: Use HEAP_MEM_POOL_ADD_SIZE KConfig options 2023-12-20 11:01:42 +01:00
gd32vf103c_starter
gd32vf103v_eval test: flash: add gd32 boards 2023-12-01 10:51:52 +00:00
hifive1
hifive1_revb
hifive_unleashed
hifive_unmatched boards: riscv: hifive_unmatched: add Renode simulation support 2023-11-24 09:25:31 +01:00
icev_wireless boards: riscv: Use HEAP_MEM_POOL_ADD_SIZE KConfig options 2023-12-20 11:01:42 +01:00
it8xxx2_evb input: it8xxx2: use the generic keyboard code 2023-11-16 17:54:00 +01:00
it82xx2_evb input: it8xxx2: use the generic keyboard code 2023-11-16 17:54:00 +01:00
litex_vexriscv
longan_nano
m2gl025_miv
mpfs_icicle dts: riscv: rename PolarFire SoC using device family name 2023-12-06 17:54:29 +00:00
neorv32
niosv_g
niosv_m
opentitan_earlgrey
qemu_riscv32
qemu_riscv32e
qemu_riscv64 kernel: spinlock: Ticket spinlocks 2023-11-04 07:38:39 -04:00
rv32m1_vega doc: Fix double 'the' 2023-11-15 14:25:11 +00:00
sparkfun_red_v_things_plus
stamp_c3 boards: riscv: Use HEAP_MEM_POOL_ADD_SIZE KConfig options 2023-12-20 11:01:42 +01:00
titanium_ti60_f225
tlsr9518adk80d
xiao_esp32c3 boards: riscv: Use HEAP_MEM_POOL_ADD_SIZE KConfig options 2023-12-20 11:01:42 +01:00
index.rst