79 lines
1.4 KiB
ArmAsm
79 lines
1.4 KiB
ArmAsm
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Cache manipulation
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*
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* This module contains functions for manipulating caches.
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*/
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#include <arch/x86/asm.h>
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#ifndef CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED
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#if defined(CONFIG_CLFLUSH_DETECT)
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#define CACHE_FLUSH_NAME _cache_flush_wbinvd
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#define CPUID_CFLSH_BIT (1 << 19)
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GTEXT(_is_clflush_available)
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SECTION_FUNC(TEXT, _is_clflush_available)
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pushl %ebx
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movl $1, %eax
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cpuid
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movl %edx, %eax
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andl $CPUID_CFLSH_BIT, %eax
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popl %ebx
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ret
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#else
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#define CACHE_FLUSH_NAME sys_cache_flush
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#endif
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/* externs (internal APIs) */
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GTEXT(CACHE_FLUSH_NAME)
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/**
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*
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* @brief Flush a page to main memory
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*
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* This implementation flushes the whole cache.
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*
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* C signature:
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*
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* void sys_cache_flush (vaddr_t virt, size_t size)
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*
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* Both parameters are ignored in this implementation.
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*
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* @return N/A
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*/
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SECTION_FUNC(TEXT, CACHE_FLUSH_NAME)
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wbinvd
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ret
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#endif /* !CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED */
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#if defined(CONFIG_CACHE_LINE_SIZE_DETECT)
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#define CPUID_CACHE_LINE_MASK (0xff << 8)
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GTEXT(_cache_line_size_get)
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SECTION_FUNC(TEXT, _cache_line_size_get)
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pushl %ebx
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movl $1, %eax
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cpuid
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movl %ebx, %eax
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andl $CPUID_CACHE_LINE_MASK, %eax
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shrl $5,%eax /* shift right 8 to get value, then multiple by 8
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* to get cache line size */
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popl %ebx
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ret
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#endif /* CONFIG_CACHE_LINE_SIZE_DETECT */
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