43d84147d9
The PCI API was originally limited to 32 bit addresses. Even though it had code to skip over the high word in 64 bit BAR entries, it refused to use it and returned a 32 bit value. Some devices in the wild have default mappings from the firmware for devices above 4G. Also remove the "iobar" API. It's dead code, we don't call it and we don't test it. IO space BAR entries are a legacy feature from way, way back in PCI history (I genuinely have never heard of a real device that uses them!). And there's no difference in format between one of these and a 32 bit "memory" BAR anyway, someone who actually had this requirement could just use the existing API without worry. Signed-off-by: Andy Ross <andrew.j.ross@intel.com> |
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| .. | ||
| endpoint | ||
| CMakeLists.txt | ||
| Kconfig | ||
| msi.c | ||
| pcie.c | ||
| shell.c | ||