zephyr/dts/arm/st/f4/stm32f413.dtsi

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/*
* Copyright (c) 2017 Florian Vaussard, HEIG-VD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/f4/stm32f413-pinctrl.dtsi>
#include <st/f4/stm32f411.dtsi>
/ {
soc {
pinctrl: pin-controller@40020000 {
gpiof: gpio@40021400 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40021400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>;
label = "GPIOF";
};
gpiog: gpio@40021800 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40021800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000040>;
label = "GPIOG";
};
};
timers6: timers@40001000 {
compatible = "st,stm32-timers";
reg = <0x40001000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000010>;
status = "disabled";
label = "TIMERS_6";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_6";
#pwm-cells = <2>;
};
};
timers7: timers@40001400 {
compatible = "st,stm32-timers";
reg = <0x40001400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
status = "disabled";
label = "TIMERS_7";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_7";
#pwm-cells = <2>;
};
};
timers12: timers@40001800 {
compatible = "st,stm32-timers";
reg = <0x40001800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000040>;
status = "disabled";
label = "TIMERS_12";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_12";
#pwm-cells = <2>;
};
};
timers13: timers@40001c00 {
compatible = "st,stm32-timers";
reg = <0x40001c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000080>;
status = "disabled";
label = "TIMERS_13";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_13";
#pwm-cells = <2>;
};
};
timers14: timers@40002000 {
compatible = "st,stm32-timers";
reg = <0x40002000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000100>;
status = "disabled";
label = "TIMERS_14";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_14";
#pwm-cells = <2>;
};
};
usart3: serial@40004800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
interrupts = <39 0>;
status = "disabled";
label = "UART_3";
};
uart4: serial@40004c00 {
compatible ="st,stm32-uart";
reg = <0x40004c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
interrupts = <52 0>;
status = "disabled";
label = "UART_4";
};
uart5: serial@40005000 {
compatible = "st,stm32-uart";
reg = <0x40005000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>;
interrupts = <53 0>;
status = "disabled";
label = "UART_5";
};
uart7: serial@40007800 {
compatible = "st,stm32-uart";
reg = <0x40007800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>;
interrupts = <82 0>;
status = "disabled";
label = "UART_7";
};
uart8: serial@40007c00 {
compatible = "st,stm32-uart";
reg = <0x40007c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>;
interrupts = <83 0>;
status = "disabled";
label = "UART_8";
};
timers8: timers@40010400 {
compatible = "st,stm32-timers";
reg = <0x40010400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000002>;
status = "disabled";
label = "TIMERS_8";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_8";
#pwm-cells = <2>;
};
};
uart9: serial@40011800 {
compatible = "st,stm32-uart";
reg = <0x40011800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000040>;
interrupts = <88 0>;
status = "disabled";
label = "UART_9";
};
uart10: serial@40011c00 {
compatible = "st,stm32-uart";
reg = <0x40011c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000080>;
interrupts = <89 0>;
status = "disabled";
label = "UART_10";
};
usbotg_fs: usb@50000000 {
num-bidir-endpoints = <6>;
};
};
};