zephyr/soc
Shawn Nematbakhsh c74526919d soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS.
Rather than specify input clock for each peripheral individually, instead
specify the relevant clocks in DTS.

This will enable easier support for non-default coreclk on fe310 in a
follow-up CL.

Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
2022-04-05 12:00:03 +02:00
..
arc include: remove unnecessary autoconf.h includes 2022-04-05 11:18:20 +02:00
arm include: remove unnecessary autoconf.h includes 2022-04-05 11:18:20 +02:00
arm64 include: remove unnecessary autoconf.h includes 2022-04-05 11:18:20 +02:00
mips soc: mips: add Qemu Malta support 2022-01-19 13:48:21 -05:00
nios2
posix posix: Select CPU_HAS_FPU for POSIX arch 2022-03-24 10:44:38 +01:00
riscv soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS. 2022-04-05 12:00:03 +02:00
sparc include: remove unnecessary autoconf.h includes 2022-04-05 11:18:20 +02:00
x86 everywhere: fix typos 2022-03-18 13:24:08 -04:00
xtensa include: remove unnecessary autoconf.h includes 2022-04-05 11:18:20 +02:00
Kconfig kconfig: soc and shield cleanup 2021-06-11 16:13:22 +02:00