zephyr/drivers/serial/uart_stm32.h

82 lines
1.8 KiB
C

/*
* Copyright (c) 2016 Open-RnD Sp. z o.o.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief Driver for UART port on STM32 family processor.
*
*/
#ifndef ZEPHYR_DRIVERS_SERIAL_UART_STM32_H_
#define ZEPHYR_DRIVERS_SERIAL_UART_STM32_H_
#include <drivers/pinmux.h>
/* device config */
struct uart_stm32_config {
struct uart_device_config uconf;
/* clock subsystem driving this peripheral */
struct stm32_pclken pclken;
/* initial hardware flow control, 1 for RTS/CTS */
bool hw_flow_control;
/* initial parity, 0 for none, 1 for odd, 2 for even */
int parity;
const struct soc_gpio_pinctrl *pinctrl_list;
size_t pinctrl_list_size;
#if defined(CONFIG_PM) \
&& !defined(CONFIG_UART_INTERRUPT_DRIVEN) \
&& !defined(CONFIG_UART_ASYNC_API)
uart_irq_config_func_t irq_config_func;
#endif
};
#ifdef CONFIG_UART_ASYNC_API
struct uart_dma_stream {
const struct device *dma_dev;
uint32_t dma_channel;
struct dma_config dma_cfg;
uint8_t priority;
bool src_addr_increment;
bool dst_addr_increment;
int fifo_threshold;
struct dma_block_config blk_cfg;
uint8_t *buffer;
size_t buffer_length;
size_t offset;
volatile size_t counter;
int32_t timeout;
struct k_work_delayable timeout_work;
bool enabled;
};
#endif
/* driver data */
struct uart_stm32_data {
/* Baud rate */
uint32_t baud_rate;
/* clock device */
const struct device *clock;
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
uart_irq_callback_user_data_t user_cb;
void *user_data;
#endif
#ifdef CONFIG_UART_ASYNC_API
const struct device *uart_dev;
uart_callback_t async_cb;
void *async_user_data;
struct uart_dma_stream dma_rx;
struct uart_dma_stream dma_tx;
uint8_t *rx_next_buffer;
size_t rx_next_buffer_len;
#endif
#ifdef CONFIG_PM
bool tx_poll_stream_on;
bool pm_constraint_on;
#endif
};
#endif /* ZEPHYR_DRIVERS_SERIAL_UART_STM32_H_ */