165 lines
3.4 KiB
Plaintext
165 lines
3.4 KiB
Plaintext
/*
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* Copyright (c) 2018 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <mem.h>
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#define DT_FLASH_SIZE DT_SIZE_K(8912)
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#define DT_SRAM_SIZE DT_SIZE_M(2048)
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#include <apollo_lake.dtsi>
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#include <dt-bindings/i2c/i2c.h>
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/ {
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model = "up_squared";
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compatible = "intel,apollo_lake";
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chosen {
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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zephyr,console = &uart0;
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zephyr,shell-uart = &uart0;
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zephyr,bt-uart = &uart1;
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zephyr,uart-pipe = &uart1;
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zephyr,bt-mon-uart = &uart1;
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};
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soc {
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uart0: uart@81434000 {
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compatible = "ns16550";
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reg = <0x81434000 0x1000>;
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label = "UART_0";
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clock-frequency = <1843200>;
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interrupts = <4 IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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status = "ok";
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current-speed = <115200>;
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};
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uart1: uart@81432000 {
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compatible = "ns16550";
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reg = <0x81432000 0x1000>;
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label = "UART_1";
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clock-frequency = <1843200>;
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interrupts = <5 IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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status = "ok";
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current-speed = <115200>;
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};
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i2c0: i2c@81444000 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x81444000 0x1000>;
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interrupts = <27 IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_0";
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status = "ok";
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};
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i2c1: i2c@81442000 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x81442000 0x1000>;
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interrupts = <28 IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_1";
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status = "ok";
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};
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i2c2: i2c@81440000 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x81440000 0x1000>;
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interrupts = <29 IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_2";
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status = "ok";
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};
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i2c3: i2c@8143e000 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x8143e000 0x1000>;
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interrupts = <30 IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_3";
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status = "ok";
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};
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i2c4: i2c@8143c000 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x8143c000 0x1000>;
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interrupts = <31 IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_4";
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status = "ok";
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};
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i2c5: i2c@8143a000 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x8143a000 0x1000>;
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interrupts = <32 IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_5";
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status = "ok";
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};
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i2c6: i2c@81438000 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x81438000 0x1000>;
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interrupts = <33 IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_6";
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status = "ok";
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};
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i2c7: i2c@81436000 {
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compatible = "snps,designware-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x81436000 0x1000>;
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interrupts = <34 IRQ_TYPE_LEVEL_LOW 3>;
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interrupt-parent = <&intc>;
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label = "I2C_7";
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status = "ok";
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};
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};
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};
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&gpio {
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status = "ok";
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};
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