102 lines
1.9 KiB
Plaintext
102 lines
1.9 KiB
Plaintext
/*
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* Copyright (c) 2022 Nordic Semiconductor
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 20)>,
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<NRF_PSEL(UART_RX, 0, 19)>,
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<NRF_PSEL(UART_RTS, 0, 5)>,
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<NRF_PSEL(UART_CTS, 0, 7)>;
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};
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};
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uart0_sleep: uart0_sleep {
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group1 {
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psels = <NRF_PSEL(UART_TX, 0, 20)>,
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<NRF_PSEL(UART_RX, 0, 19)>,
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<NRF_PSEL(UART_RTS, 0, 5)>,
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<NRF_PSEL(UART_CTS, 0, 7)>;
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low-power-enable;
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};
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};
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i2c0_default: i2c0_default {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
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<NRF_PSEL(TWIM_SCL, 0, 27)>;
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};
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};
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i2c0_sleep: i2c0_sleep {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
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<NRF_PSEL(TWIM_SCL, 0, 27)>;
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low-power-enable;
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};
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};
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i2c1_default: i2c1_default {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
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<NRF_PSEL(TWIM_SCL, 0, 31)>;
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};
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};
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i2c1_sleep: i2c1_sleep {
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group1 {
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psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
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<NRF_PSEL(TWIM_SCL, 0, 31)>;
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low-power-enable;
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};
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};
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pwm0_default: pwm0_default {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 0, 22)>,
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<NRF_PSEL(PWM_OUT1, 0, 23)>,
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<NRF_PSEL(PWM_OUT2, 0, 24)>;
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nordic,invert;
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};
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};
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pwm0_sleep: pwm0_sleep {
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group1 {
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psels = <NRF_PSEL(PWM_OUT0, 0, 22)>,
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<NRF_PSEL(PWM_OUT1, 0, 23)>,
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<NRF_PSEL(PWM_OUT2, 0, 24)>;
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low-power-enable;
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};
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};
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qspi_default: qspi_default {
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group1 {
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psels = <NRF_PSEL(QSPI_SCK, 1, 3)>,
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<NRF_PSEL(QSPI_IO0, 1, 5)>,
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<NRF_PSEL(QSPI_IO1, 1, 4)>,
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<NRF_PSEL(QSPI_IO2, 1, 2)>,
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<NRF_PSEL(QSPI_IO3, 1, 1)>,
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<NRF_PSEL(QSPI_CSN, 1, 6)>;
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};
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};
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qspi_sleep: qspi_sleep {
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group1 {
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psels = <NRF_PSEL(QSPI_SCK, 1, 3)>,
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<NRF_PSEL(QSPI_IO0, 1, 5)>,
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<NRF_PSEL(QSPI_IO1, 1, 4)>,
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<NRF_PSEL(QSPI_IO2, 1, 2)>,
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<NRF_PSEL(QSPI_IO3, 1, 1)>;
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low-power-enable;
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};
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group2 {
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psels = <NRF_PSEL(QSPI_CSN, 1, 6)>;
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low-power-enable;
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bias-pull-up;
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};
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};
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};
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