151 lines
3.8 KiB
C
151 lines
3.8 KiB
C
/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/** @file
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* @brief GPIO driver for LPC54XXX family
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*
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* Note:
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* - Only basic GPIO features sufficient to blinky functionality
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* are currently implemented.
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* - Interrupt mode is not implemented.
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*/
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#include <errno.h>
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#include <device.h>
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#include <gpio.h>
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#include <soc.h>
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#include <fsl_common.h>
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#include "gpio_utils.h"
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#include <fsl_gpio.h>
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#include <fsl_device_registers.h>
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#define PORT0_IDX 0u
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#define PORT1_IDX 1u
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struct gpio_mcux_lpc_config {
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GPIO_Type *gpio_base;
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u32_t port_no;
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clock_ip_name_t clock_ip_name;
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};
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struct gpio_mcux_lpc_data {
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/* port ISR callback routine address */
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sys_slist_t callbacks;
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/* pin callback routine enable flags, by pin number */
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u32_t pin_callback_enables;
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};
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static int gpio_mcux_lpc_configure(struct device *dev,
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int access_op, u32_t pin, int flags)
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{
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const struct gpio_mcux_lpc_config *config = dev->config->config_info;
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GPIO_Type *gpio_base = config->gpio_base;
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/* Check for an invalid pin configuration */
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if ((flags & GPIO_INT) && (flags & GPIO_DIR_OUT)) {
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return -EINVAL;
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}
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/* Check if GPIO port supports interrupts */
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if (flags & GPIO_INT) {
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return -EINVAL;
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}
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/* supports access by pin now,you can add access by port when needed */
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if (access_op == GPIO_ACCESS_BY_PIN) {
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/* input-0,output-1 */
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if ((flags & GPIO_DIR_MASK) == GPIO_DIR_IN) {
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gpio_base->DIR[config->port_no] &= ~(BIT(pin));
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} else {
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gpio_base->SET[config->port_no] = BIT(pin);
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gpio_base->DIR[config->port_no] |= BIT(pin);
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}
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} else {
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return -EINVAL;
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}
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return 0;
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}
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static int gpio_mcux_lpc_write(struct device *dev,
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int access_op, u32_t pin, u32_t value)
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{
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const struct gpio_mcux_lpc_config *config = dev->config->config_info;
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GPIO_Type *gpio_base = config->gpio_base;
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if (access_op == GPIO_ACCESS_BY_PIN) {
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/* Set/Clear the data output for the respective pin */
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gpio_base->B[config->port_no][pin] = value;
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} else { /* return an error for all other options */
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return -EINVAL;
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}
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return 0;
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}
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static int gpio_mcux_lpc_read(struct device *dev,
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int access_op, u32_t pin, u32_t *value)
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{
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const struct gpio_mcux_lpc_config *config = dev->config->config_info;
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GPIO_Type *gpio_base = config->gpio_base;
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*value = gpio_base->PIN[config->port_no];
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if (access_op == GPIO_ACCESS_BY_PIN) {
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*value = (*value & BIT(pin)) >> pin;
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} else { /* return an error for all other options */
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return -EINVAL;
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}
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return 0;
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}
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static int gpio_mcux_lpc_init(struct device *dev)
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{
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const struct gpio_mcux_lpc_config *config = dev->config->config_info;
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CLOCK_EnableClock(config->clock_ip_name);
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return 0;
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}
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static const struct gpio_driver_api gpio_mcux_lpc_driver_api = {
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.config = gpio_mcux_lpc_configure,
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.write = gpio_mcux_lpc_write,
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.read = gpio_mcux_lpc_read,
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};
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#ifdef CONFIG_GPIO_MCUX_LPC_PORT0
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static const struct gpio_mcux_lpc_config gpio_mcux_lpc_port0_config = {
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.gpio_base = GPIO,
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.port_no = PORT0_IDX,
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.clock_ip_name = kCLOCK_Gpio0,
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};
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static struct gpio_mcux_lpc_data gpio_mcux_lpc_port0_data;
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DEVICE_AND_API_INIT(gpio_mcux_lpc_port0, CONFIG_GPIO_MCUX_LPC_PORT0_NAME,
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gpio_mcux_lpc_init,
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&gpio_mcux_lpc_port0_data, &gpio_mcux_lpc_port0_config,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
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&gpio_mcux_lpc_driver_api);
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#endif /* CONFIG_GPIO_MCUX_LPC_PORT0 */
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#ifdef CONFIG_GPIO_MCUX_LPC_PORT1
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static const struct gpio_mcux_lpc_config gpio_mcux_lpc_port1_config = {
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.gpio_base = GPIO,
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.port_no = PORT1_IDX,
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.clock_ip_name = kCLOCK_Gpio1,
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};
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static struct gpio_mcux_lpc_data gpio_mcux_lpc_port1_data;
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DEVICE_AND_API_INIT(gpio_mcux_lpc_port1, CONFIG_GPIO_MCUX_LPC_PORT1_NAME,
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gpio_mcux_lpc_init,
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&gpio_mcux_lpc_port1_data, &gpio_mcux_lpc_port1_config,
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
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&gpio_mcux_lpc_driver_api);
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#endif /* CONFIG_GPIO_MCUX_LPC_PORT1 */
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