6205f82d4f
This commit updates the device tree and memory header file for the Intel MTPM 1.5 platform to define the LSBPM and HSBPM registers. Changes include: - Added node definitions for 'lsbpm' and 'hsbpm' in intel_adsp_ace15_mtpm.dtsi - Updated adsp_memory.h Signed-off-by: Damian Nikodem <damian.nikodem@intel.com> |
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| .. | ||
| intel_adsp_ace15_mtpm.dtsi | ||
| intel_adsp_ace20_lnl.dtsi | ||
| intel_adsp_cavs.dtsi | ||
| intel_adsp_cavs15.dtsi | ||
| intel_adsp_cavs18.dtsi | ||
| intel_adsp_cavs20.dtsi | ||
| intel_adsp_cavs20_jsl.dtsi | ||
| intel_adsp_cavs25.dtsi | ||
| intel_adsp_cavs25_tgph.dtsi | ||