zephyr/include/arch/riscv
Kumar Gala 95f78bcacf interrupt: Convert RISC-V plic to use multi-level irq support
Utilize the multi-level irq infrastructure and replace custom handling
for PLIC on riscv-privilege SoCs.  The old code offset IRQs in drivers
and various places with RISCV_MAX_GENERIC_IRQ.  Instead utilize Zephyr's
encoded IRQ and replace offsets in drivers with the IRQ define from DTS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-09-10 07:34:57 -05:00
..
common
riscv-privilege arch/riscv: rearrange for standard use of extern "C" 2019-08-18 16:20:10 +02:00
arch.h interrupt: Convert RISC-V plic to use multi-level irq support 2019-09-10 07:34:57 -05:00
exp.h arch/riscv: rearrange for standard use of extern "C" 2019-08-18 16:20:10 +02:00