168 lines
4.4 KiB
C
168 lines
4.4 KiB
C
/* ARM Cortex-M GCC specific public inline assembler functions and macros */
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/*
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* Copyright (c) 2015, Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Either public functions or macros or invoked by public functions */
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#ifndef ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_ASM_INLINE_GCC_H_
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#define ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_ASM_INLINE_GCC_H_
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/*
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* The file must not be included directly
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* Include arch/cpu.h instead
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*/
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#ifndef _ASMLANGUAGE
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#include <zephyr/types.h>
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#include <arch/arm/exc.h>
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#include <irq.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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*
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* @brief Disable all interrupts on the CPU
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*
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* This routine disables interrupts. It can be called from either interrupt or
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* thread level. This routine returns an architecture-dependent
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* lock-out key representing the "interrupt disable state" prior to the call;
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* this key can be passed to irq_unlock() to re-enable interrupts.
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*
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* The lock-out key should only be used as the argument to the irq_unlock()
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* API. It should never be used to manually re-enable interrupts or to inspect
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* or manipulate the contents of the source register.
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*
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* This function can be called recursively: it will return a key to return the
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* state of interrupt locking to the previous level.
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*
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* WARNINGS
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* Invoking a kernel routine with interrupts locked may result in
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* interrupts being re-enabled for an unspecified period of time. If the
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* called routine blocks, interrupts will be re-enabled while another
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* thread executes, or while the system is idle.
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*
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* The "interrupt disable state" is an attribute of a thread. Thus, if a
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* thread disables interrupts and subsequently invokes a kernel
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* routine that causes the calling thread to block, the interrupt
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* disable state will be restored when the thread is later rescheduled
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* for execution.
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*
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* @return An architecture-dependent lock-out key representing the
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* "interrupt disable state" prior to the call.
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*
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* @internal
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*
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* On ARMv7-M and ARMv8-M Mainline CPUs, this function prevents regular
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* exceptions (i.e. with interrupt priority lower than or equal to
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* _EXC_IRQ_DEFAULT_PRIO) from interrupting the CPU. NMI, Faults, SVC,
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* and Zero Latency IRQs (if supported) may still interrupt the CPU.
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*
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* On ARMv6-M and ARMv8-M Baseline CPUs, this function reads the value of
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* PRIMASK which shows if interrupts are enabled, then disables all interrupts
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* except NMI.
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*/
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static ALWAYS_INLINE unsigned int z_arch_irq_lock(void)
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{
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unsigned int key;
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#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
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__asm__ volatile("mrs %0, PRIMASK;"
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"cpsid i"
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: "=r" (key)
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:
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: "memory");
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#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
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unsigned int tmp;
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__asm__ volatile(
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"mov %1, %2;"
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"mrs %0, BASEPRI;"
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"msr BASEPRI, %1;"
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"isb;"
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: "=r"(key), "=r"(tmp)
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: "i"(_EXC_IRQ_DEFAULT_PRIO)
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: "memory");
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#elif defined(CONFIG_ARMV7_R)
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__asm__ volatile("mrs %0, cpsr;"
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"cpsid i"
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: "=r" (key)
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:
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: "memory", "cc");
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#else
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#error Unknown ARM architecture
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#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
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return key;
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}
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/**
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*
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* @brief Enable all interrupts on the CPU (inline)
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*
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* This routine re-enables interrupts on the CPU. The @a key parameter is an
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* architecture-dependent lock-out key that is returned by a previous
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* invocation of irq_lock().
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*
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* This routine can be called from either interrupt or thread level.
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*
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* @param key architecture-dependent lock-out key
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*
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* @return N/A
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*
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* On Cortex-M0/M0+, this enables all interrupts if they were not
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* previously disabled.
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*
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*/
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static ALWAYS_INLINE void z_arch_irq_unlock(unsigned int key)
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{
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#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
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if (key) {
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return;
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}
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__asm__ volatile(
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"cpsie i;"
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"isb"
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: : : "memory");
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#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
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__asm__ volatile(
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"msr BASEPRI, %0;"
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"isb;"
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: : "r"(key) : "memory");
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#elif defined(CONFIG_ARMV7_R)
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__asm__ volatile("msr cpsr_c, %0"
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:
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: "r" (key)
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: "memory", "cc");
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#else
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#error Unknown ARM architecture
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#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
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}
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/**
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* Returns true if interrupts were unlocked prior to the
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* z_arch_irq_lock() call that produced the key argument.
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*/
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static ALWAYS_INLINE bool z_arch_irq_unlocked(unsigned int key)
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{
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/* This convention works for both PRIMASK and BASEPRI */
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return key == 0;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_INCLUDE_ARCH_ARM_CORTEX_M_ASM_INLINE_GCC_H_ */
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