zephyr/arch/arm/soc/ti_simplelink/cc32xx
Erwan Gouriou 081c9c3bec scripts: extract_dts_includes: Generate'_0' defines only when needed
Indexed defines were systematically generated even when there
was only one element to generate.
So we ended up generated a lot of _0 defines.
Then we needed to generate aliases to these _0 indexed defines,
in order to get useful defines.
For instance:
 #define GPIO_LEDS_0_GPIO_FLAGS_0	4
 #define GPIO_LEDS_0_GPIO_PIN_0		5
 #define GPIO_LEDS_0_GPIO_FLAGS		GPIO_LEDS_0_GPIO_FLAGS_0
 #define GPIO_LEDS_0_GPIO_PIN		GPIO_LEDS_0_GPIO_PIN_0

This commit allows to generate _0 indexed define only if a
property has more than one elements to define.
Aliases generation to _0 indexed defines are also removed.

Note: IRQ are left untouched since this is frequent to handle
multiple IRQs in a driver

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-05-10 10:38:23 -05:00
..
CMakeLists.txt
Kconfig.defconfig.cc3220sf
Kconfig.defconfig.series kconfig: Make 'source' non-globbing and use 'gsource' 2018-05-08 11:14:12 +02:00
Kconfig.series arch: arm: Refactor CONFIG_CORTEX_M 2018-03-10 11:42:25 -06:00
Kconfig.soc
README
dts.fixup scripts: extract_dts_includes: Generate'_0' defines only when needed 2018-05-10 10:38:23 -05:00
linker.ld
soc.c cc3220sf: soc: Update PRCM call to allow use of ROM API 2018-05-08 17:35:25 -05:00
soc.h soc: ti_simplelink: cc32xx: Remove ARMV7_M guard from CMSIS_IRQn_Type 2018-02-06 17:34:25 -06:00

README

CC3220 Info taken from:
* http://www.ti.com/lit/ug/swru465/swru465.pdf

Notes for CC3220SF:
 * Text must start at 0x800 offset in flash.  The first 0x800 bytes are
   reserved for the flash header.
 * See CONFIG_TEXT_SECTION_OFFSET.