Anas Nashif c4c919dbe0 Move compiler optimization to the SoC ... Decisions on compiler optimizations were done on the architecture level, this does not scale and some SoCs will have different optimization levels or compiler options needed. Moving this to the SoC makes it easy to optimize differently when using the same CPU which we use to set the right optimization now on the architecture level. For IAMCU platforms, use the right architecture and tuning. -march=lakemont -mtune=lakemont -miamcu -msoft-float Change-Id: I458afca5feb9be5de8dcae559d6dcac3c6d6a2a7 Signed-off-by: Anas Nashif <anas.nashif@intel.com>		2016-02-05 20:25:29 -05:00
..
core	arch/arc: fixes native C version of atomic_nand	2016-02-05 20:25:28 -05:00
include	idle: fix tasks waiting when NANO_TIMEOUTS is enabled	2016-02-05 20:25:24 -05:00
soc/quark_se_ss	Move compiler optimization to the SoC	2016-02-05 20:25:29 -05:00
Kbuild	build: fix issue with static interrupts on ARC/ARM	2016-02-05 20:25:25 -05:00
Kconfig	ARM: ARC: put sw_isr_table in ROM by default	2016-02-05 20:25:21 -05:00
Makefile	Move compiler optimization to the SoC	2016-02-05 20:25:29 -05:00
defconfig	kconfig: ram size/start are set in platform Kconfig	2016-02-05 20:25:15 -05:00