91 lines
2.6 KiB
C
91 lines
2.6 KiB
C
/*
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* Copyright (c) 2014 Wind River Systems, Inc.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/**
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* @file
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* @brief ARCv2 Interrupt Unit device driver
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*
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* The ARCv2 interrupt unit has 16 allocated exceptions associated with
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* vectors 0 to 15 and 240 interrupts associated with vectors 16 to 255.
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* The interrupt unit is optional in the ARCv2-based processors. When
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* building a processor, you can configure the processor to include an
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* interrupt unit. The ARCv2 interrupt unit is highly programmable.
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*/
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#include <nanokernel.h>
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#include <arch/cpu.h>
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#include <board.h>
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extern void *_VectorTable;
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/*
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* @brief Initialize the interrupt unit device driver
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*
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* Initializes the interrupt unit device driver and the device
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* itself.
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*
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* Interrupts are still locked at this point, so there is no need to protect
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* the window between a write to IRQ_SELECT and subsequent writes to the
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* selected IRQ's registers.
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*
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* @return N/A
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*/
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void _arc_v2_irq_unit_init(void)
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{
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int irq; /* the interrupt index */
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for (irq = 16; irq < CONFIG_NUM_IRQS; irq++) {
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY, 1);
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_ENABLE, _ARC_V2_INT_DISABLE);
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_TRIGGER, _ARC_V2_INT_LEVEL);
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}
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}
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/*
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* @brief Send EOI signal to interrupt unit
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*
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* This routine sends an EOI (End Of Interrupt) signal to the interrupt unit
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* to clear a pulse-triggered interrupt.
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*
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* Interrupts must be locked or the ISR operating at P0 when invoking this
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* function.
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*
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* @return N/A
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*/
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void _arc_v2_irq_unit_int_eoi(int irq)
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{
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_PULSE_CANCEL, 1);
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}
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/*
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* @brief Sets an IRQ line to level/pulse trigger
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*
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* Sets the IRQ line <irq> to trigger an interrupt based on the level or the
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* edge of the signal. Valid values for <trigger> are _ARC_V2_INT_LEVEL and
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* _ARC_V2_INT_PULSE.
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*
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* @return N/A
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*/
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void _arc_v2_irq_unit_trigger_set(int irq, unsigned int trigger)
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{
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
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_arc_v2_aux_reg_write(_ARC_V2_IRQ_TRIGGER, trigger);
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}
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