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zephyr/drivers/clock_control
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Florian Vaussard 33579adef9 clock: stm32f4: Fix range of CLOCK_STM32F4X_PLLN_MULTIPLIER config 
The PLLN multiplier can range between 50 and 432 on all STM32F4, except
on the STM32F401 where the lower bound is restricted to 192.

Fix the range property and the help text to reflect this reality.

Change-Id: I7b93e84b321f7869aaf611287344cd3e25c893c8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
 		2017-03-27 09:05:57 -05:00
..
Kconfig clock control: clean up after stm32cube LL driver 2017-02-10 14:47:41 -06:00
Kconfig.beetle license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
Kconfig.nrf5 license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
Kconfig.quark_se license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
Kconfig.stm32 clock control:stm32: provide STM32Cube LL based driver 2017-02-10 14:47:41 -06:00
Kconfig.stm32f4x clock: stm32f4: Fix range of CLOCK_STM32F4X_PLLN_MULTIPLIER config 2017-03-27 09:05:57 -05:00
Kconfig.stm32f10x license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
Kconfig.stm32f107xx license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
Makefile clock control: clean up after stm32cube LL driver 2017-02-10 14:47:41 -06:00
beetle_clock_control.c license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
nrf5_power_clock.c clock_control: nrf5_power: Use CMSIS NVIC APIs directly 2017-01-23 15:15:55 -06:00
quark_se_clock_control.c license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
stm32_ll_clock.c clock_control: stm32: code optimization 2017-02-10 14:47:41 -06:00
stm32_ll_clock.h clock_control: stm32: code optimization 2017-02-10 14:47:41 -06:00
stm32f3x_ll_clock.c clock control:stm32: provide STM32Cube LL based driver 2017-02-10 14:47:41 -06:00
stm32f4x_clock.c license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
stm32f10x_clock.c license: Replace Apache boilerplate with SPDX tag 2017-01-19 03:50:58 +00:00
stm32f107xx_clock.c clock_control: fix to get PLL2 source for PREDV1 working 2017-02-22 18:09:22 -06:00
stm32l4x_ll_clock.c clock_control: stm32: code optimization 2017-02-10 14:47:41 -06:00