178 lines
6.1 KiB
YAML
178 lines
6.1 KiB
YAML
# Copyright (c) 2023 Antmicro <www.antmicro.com>
|
|
# SPDX-License-Identifier: Apache-2.0
|
|
|
|
description: |
|
|
The Ambiq Apollo4 pin controller is a node responsible for controlling
|
|
pin function selection and pin properties, such as routing a UART0 TX
|
|
to pin 60 and enabling the pullup resistor on that pin.
|
|
|
|
The node has the 'pinctrl' node label set in your SoC's devicetree,
|
|
so you can modify it like this:
|
|
|
|
&pinctrl {
|
|
/* your modifications go here */
|
|
};
|
|
|
|
All device pin configurations should be placed in child nodes of the
|
|
'pinctrl' node, as shown in this example:
|
|
|
|
/* You can put this in places like a board-pinctrl.dtsi file in
|
|
* your board directory, or a devicetree overlay in your application.
|
|
*/
|
|
|
|
/* include pre-defined combinations for the SoC variant used by the board */
|
|
#include <dt-bindings/pinctrl/ambiq-apollo4-pinctrl.h>
|
|
|
|
&pinctrl {
|
|
uart0_default: uart0_default {
|
|
group1 {
|
|
pinmux = <UART0TX_P60>;
|
|
};
|
|
group2 {
|
|
pinmux = <UART0RX_P47>;
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
|
|
The 'uart0_default' child node encodes the pin configurations for a
|
|
particular state of a device; in this case, the default (that is, active)
|
|
state.
|
|
|
|
As shown, pin configurations are organized in groups within each child node.
|
|
Each group can specify a list of pin function selections in the 'pinmux'
|
|
property.
|
|
|
|
A group can also specify shared pin properties common to all the specified
|
|
pins, such as the 'input-enable' property in group 2.
|
|
|
|
compatible: "ambiq,apollo4-pinctrl"
|
|
|
|
include: base.yaml
|
|
|
|
child-binding:
|
|
description: |
|
|
Definitions for a pinctrl state.
|
|
child-binding:
|
|
|
|
include:
|
|
- name: pincfg-node.yaml
|
|
property-allowlist:
|
|
- input-enable
|
|
- drive-push-pull
|
|
- drive-open-drain
|
|
- bias-high-impedance
|
|
- bias-pull-up
|
|
- bias-pull-down
|
|
|
|
properties:
|
|
pinmux:
|
|
required: true
|
|
type: array
|
|
description: |
|
|
An array of pins sharing the same group properties. Each
|
|
element of the array is an integer constructed from the
|
|
pin number and the alternative function of the pin.
|
|
drive-strength:
|
|
type: string
|
|
enum:
|
|
- "0.1"
|
|
- "0.5"
|
|
- "0.75"
|
|
- "1.0"
|
|
default: "0.1"
|
|
description: |
|
|
The drive strength of a pin, relative to full-driver strength.
|
|
The default value is 0.1, which is the reset value.
|
|
slew-rate:
|
|
type: string
|
|
enum:
|
|
- "slow"
|
|
- "fast"
|
|
default: "slow"
|
|
description: |
|
|
Select slew rate for a pin. The default is slow, which is the reset value.
|
|
ambiq,pull-up-ohms:
|
|
type: int
|
|
enum:
|
|
- 1500
|
|
- 6000
|
|
- 12000
|
|
- 24000
|
|
- 50000
|
|
- 100000
|
|
default: 1500
|
|
description: |
|
|
The pullup resistor value. The default value is 1500 ohms.
|
|
ambiq,iom-nce-module:
|
|
type: int
|
|
default: 0
|
|
description: |
|
|
IOM nCE module select, selects the SPI channel (CE) number (0-42).
|
|
0, IOM0CE0 : IOM 0 NCE 0 module
|
|
1, IOM0CE1 : IOM 0 NCE 1 module
|
|
2, IOM0CE2 : IOM 0 NCE 2 module
|
|
3, IOM0CE3 : IOM 0 NCE 3 module
|
|
4, IOM1CE0 : IOM 1 NCE 0 module
|
|
5, IOM1CE1 : IOM 1 NCE 1 module
|
|
6, IOM1CE2 : IOM 1 NCE 2 module
|
|
7, IOM1CE3 : IOM 1 NCE 3 module
|
|
8, IOM2CE0 : IOM 2 NCE 0 module
|
|
9, IOM2CE1 : IOM 2 NCE 1 module
|
|
10, IOM2CE2 : IOM 2 NCE 2 module
|
|
11, IOM2CE3 : IOM 2 NCE 3 module
|
|
12, IOM3CE0 : IOM 3 NCE 0 module
|
|
13, IOM3CE1 : IOM 3 NCE 1 module
|
|
14, IOM3CE2 : IOM 3 NCE 2 module
|
|
15, IOM3CE3 : IOM 3 NCE 3 module
|
|
16, IOM4CE0 : IOM 4 NCE 0 module
|
|
17, IOM4CE1 : IOM 4 NCE 1 module
|
|
18, IOM4CE2 : IOM 4 NCE 2 module
|
|
19, IOM4CE3 : IOM 4 NCE 3 module
|
|
20, IOM5CE0 : IOM 5 NCE 0 module
|
|
21, IOM5CE1 : IOM 5 NCE 1 module
|
|
22, IOM5CE2 : IOM 5 NCE 2 module
|
|
23, IOM5CE3 : IOM 5 NCE 3 module
|
|
24, IOM6CE0 : IOM 6 NCE 0 module
|
|
25, IOM6CE1 : IOM 6 NCE 1 module
|
|
26, IOM6CE2 : IOM 6 NCE 2 module
|
|
27, IOM6CE3 : IOM 6 NCE 3 module
|
|
28, IOM7CE0 : IOM 7 NCE 0 module
|
|
29, IOM7CE1 : IOM 7 NCE 1 module
|
|
30, IOM7CE2 : IOM 7 NCE 2 module
|
|
31, IOM7CE3 : IOM 7 NCE 3 module
|
|
32, MSPI0CEN0 : MSPI 0 NCE 0 module
|
|
33, MSPI0CEN1 : MSPI 0 NCE 1 module
|
|
34, MSPI1CEN0 : MSPI 1 NCE 0 module
|
|
35, MSPI1CEN1 : MSPI 1 NCE 1 module
|
|
36, MSPI2CEN0 : MSPI 2 NCE 0 module
|
|
37, MSPI2CEN1 : MSPI 2 NCE 1 module
|
|
38, DC_DPI_DE : DC DPI DE module
|
|
39, DISP_CONT_CSX : DISP CONT CSX module
|
|
40, DC_SPI_CS_N : DC SPI CS_N module
|
|
41, DC_QSPI_CS_N : DC QSPI CS_N module
|
|
42, DC_RESX : DC module RESX
|
|
If the pin is not a CE, this descriptor will be ignored.
|
|
Default value 0, which is the reset value.
|
|
ambiq,iom-mspi:
|
|
type: int
|
|
default: 0
|
|
description: |
|
|
Indicates the module which uses specific CE pin, 1 if CE is IOM, 0 if MSPI.
|
|
Default value 0, which is the reset value.
|
|
If the pin is not a CE, this descriptor will be ignored.
|
|
ambiq,iom-num:
|
|
type: int
|
|
default: 0
|
|
description: |
|
|
Indicates the instance which uses specific CE pin.
|
|
IOM number (0-7) or MSPI (0-2).
|
|
Default value 0, which is the reset value.
|
|
If the pin is not a CE, this descriptor will be ignored.
|
|
ambiq,interrupt-direction:
|
|
type: int
|
|
default: 0
|
|
description: |
|
|
Indicates the pininterrupt direction.
|
|
Default value 0, which is the reset value.
|