Filip Kokosinski 806c95163a dts/riscv: add missing `riscv,isa` fields and modify existing ones ... This commit adds/modifies `riscv,isa` strings using the following rules: * the ISA string is lowercase * multi-letter extensions are preceded with the underscore mark * if an extension is implied by another one, it is not specified - e.g. the D extension implies the F extension, so writing `rv32ifd` is redundant Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>		2023-09-14 14:34:34 +02:00
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gd32vf103.dtsi	dts/riscv: add missing `riscv,isa` fields and modify existing ones	2023-09-14 14:34:34 +02:00
gd32vf103X8.dtsi	dts: gigadevice: simplify flash/sram size assignments	2022-08-25 09:09:51 +00:00
gd32vf103Xb.dtsi	dts: gigadevice: simplify flash/sram size assignments	2022-08-25 09:09:51 +00:00