zephyr/boards/xtensa
Kai Vehmanen 1bcf79f729 soc/intel_adsp: add intel_adsp_cavs25_tgph board
Add a new board to support Intel Tiger Lake H PCH variant of cAVS2.5.

Move common Kconfig options for cavs25 to soc level. No need to
replicate these for every board.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-02-25 14:28:45 -06:00
..
esp32 dts: esp32: clean up unused pin defintions 2022-01-21 13:16:55 -05:00
esp32s2_saola drivers: wdt: esp32: code refactor to use hal calls 2022-02-21 19:40:17 -05:00
esp_wrover_kit boards: esp_wrover_kit: fix missing DTS flash input values 2022-01-19 09:30:27 -05:00
intel_adsp_cavs15 boards: xtensa: fix cAVS name: connected -> converged 2022-02-21 21:58:34 -05:00
intel_adsp_cavs18 boards: xtensa: fix cAVS name: connected -> converged 2022-02-21 21:58:34 -05:00
intel_adsp_cavs20 boards: xtensa: fix cAVS name: connected -> converged 2022-02-21 21:58:34 -05:00
intel_adsp_cavs25 soc/intel_adsp: add intel_adsp_cavs25_tgph board 2022-02-25 14:28:45 -06:00
intel_adsp_cavs25_tgph soc/intel_adsp: add intel_adsp_cavs25_tgph board 2022-02-25 14:28:45 -06:00
intel_s1000_crb boards: xtensa: fix cAVS name: connected -> converged 2022-02-21 21:58:34 -05:00
nxp_adsp_imx8 boards: xtensa: Use a CMake variable to set the rimage target name 2021-11-17 19:44:35 -05:00
nxp_adsp_imx8m boards: xtensa: Use a CMake variable to set the rimage target name 2021-11-17 19:44:35 -05:00
nxp_adsp_imx8x boards: xtensa: Use a CMake variable to set the rimage target name 2021-11-17 19:44:35 -05:00
odroid_go driver: esp32: I2C code refactoring 2021-11-05 14:07:09 -04:00
qemu_xtensa cmake: support multiple entries in board.cmake 2021-11-12 21:33:42 -05:00
xt-sim dts: use 'cdns' instead of 'xtensa' vendor prefix 2021-08-17 17:51:57 -04:00
index.rst