112 lines
4.2 KiB
Plaintext
112 lines
4.2 KiB
Plaintext
# Memory Protection Unit (MPU) configuration options
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# Copyright (c) 2017 Linaro Limited
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# SPDX-License-Identifier: Apache-2.0
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if CPU_HAS_MPU
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config ARM_MPU
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bool "ARM MPU Support"
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select MPU
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select SRAM_REGION_PERMISSIONS
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select THREAD_STACK_INFO
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select ARCH_HAS_EXECUTABLE_PAGE_BIT
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select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_MPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
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select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if CPU_HAS_ARM_MPU && (ARMV8_M_BASELINE || ARMV8_M_MAINLINE || AARCH32_ARMV8_R)
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select MPU_GAP_FILLING if AARCH32_ARMV8_R
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help
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MCU implements Memory Protection Unit.
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Notes:
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The ARMv6-M and ARMv7-M MPU architecture requires a power-of-two
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alignment of MPU region base address and size.
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The NXP MPU as well as the ARMv8-M MPU do not require MPU regions
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to have power-of-two alignment for base address and region size.
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The ARMv8-M MPU requires the active MPU regions be non-overlapping.
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As a result of this, the ARMv8-M MPU needs to fully partition the
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memory map when programming dynamic memory regions (e.g. PRIV stack
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guard, user thread stack, and application memory domains), if the
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system requires PRIV access policy different from the access policy
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of the ARMv8-M background memory map. The application developer may
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enforce full PRIV (kernel) memory partition by enabling the
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CONFIG_MPU_GAP_FILLING option.
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By not enforcing full partition, MPU may leave part of kernel
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SRAM area covered only by the default ARMv8-M memory map. This
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is fine for User Mode, since the background ARM map does not
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allow nPRIV access at all. However, since the background map
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policy allows instruction fetches by privileged code, forcing
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this Kconfig option off prevents the system from directly
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triggering MemManage exceptions upon accidental attempts to
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execute code from SRAM in XIP builds.
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Since this does not compromise User Mode, we make the skipping
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of full partitioning the default behavior for the ARMv8-M MPU
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driver.
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config ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
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int
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default 256 if ARM_MPU && ARMV6_M_ARMV8_M_BASELINE && !ARMV8_M_BASELINE
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default 64 if ARM_MPU && AARCH32_ARMV8_R
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default 32 if ARM_MPU
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default 4
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help
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Minimum size (and alignment) of an ARM MPU region. Use this
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symbol to guarantee minimum size and alignment of MPU regions.
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A minimum 4-byte alignment is enforced in ARM builds without
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support for Memory Protection.
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if ARM_MPU
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config MPU_STACK_GUARD
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bool "Thread Stack Guards"
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help
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Enable Thread Stack Guards via MPU
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config MPU_STACK_GUARD_MIN_SIZE_FLOAT
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int
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depends on MPU_STACK_GUARD
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depends on FPU_SHARING
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default 128
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help
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Minimum size (and alignment when applicable) of an ARM MPU
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region, which guards the stack of a thread that is using the
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Floating Point (FP) context. The width of the guard is set to
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128, to accommodate the length of a Cortex-M exception stack
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frame when the floating point context is active. The FP context
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is only stacked in sharing FP registers mode, therefore, the
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option is applicable only when FPU_SHARING is selected.
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config MPU_ALLOW_FLASH_WRITE
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bool "Add MPU access to write to flash"
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help
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Enable this to allow MPU RWX access to flash memory
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config MPU_DISABLE_BACKGROUND_MAP
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bool "Disables the default background address map"
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help
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Enable this to turn off the default background MPU address map. Your
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SoC definition should likely provide its own custom MPU regions.
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config CUSTOM_SECTION_ALIGN
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bool "Custom Section Align"
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help
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MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT(ARMv7-M) sometimes cause memory
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wasting in linker scripts defined memory sections. Use this symbol
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to guarantee user custom section align size to avoid more memory used
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for respect alignment. But that needs carefully configure MPU region
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and sub-regions(ARMv7-M) to cover this feature.
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config CUSTOM_SECTION_MIN_ALIGN_SIZE
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int "Custom Section Align Size"
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default 32
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help
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Custom align size of memory section in linker scripts. Usually
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it should consume less alignment memory. Although this alignment
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size is configured by users, it must also respect the power of
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two regulation if hardware requires.
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endif # ARM_MPU
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endif # CPU_HAS_MPU
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