166 lines
3.3 KiB
C
166 lines
3.3 KiB
C
/* ST Microelectronics LIS2DH 3-axis accelerometer driver
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*
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* Copyright (c) 2020 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Datasheet:
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* https://www.st.com/resource/en/datasheet/lis2dh.pdf
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*/
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#define DT_DRV_COMPAT st_lis2dh
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#include <string.h>
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#include "lis2dh.h"
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#include <zephyr/logging/log.h>
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
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LOG_MODULE_DECLARE(lis2dh, CONFIG_SENSOR_LOG_LEVEL);
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#define LIS2DH_SPI_READ_BIT BIT(7)
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#define LIS2DH_SPI_AUTOINC BIT(6)
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#define LIS2DH_SPI_ADDR_MASK BIT_MASK(6)
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static int lis2dh_raw_read(const struct device *dev, uint8_t reg_addr,
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uint8_t *value, uint8_t len)
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{
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const struct lis2dh_config *cfg = dev->config;
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uint8_t buffer_tx[2] = { reg_addr | LIS2DH_SPI_READ_BIT, 0 };
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const struct spi_buf tx_buf = {
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.buf = buffer_tx,
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.len = 2,
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};
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const struct spi_buf_set tx = {
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.buffers = &tx_buf,
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.count = 1
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};
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const struct spi_buf rx_buf[2] = {
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{
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.buf = NULL,
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.len = 1,
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},
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{
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.buf = value,
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.len = len,
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}
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};
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const struct spi_buf_set rx = {
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.buffers = rx_buf,
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.count = 2
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};
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if (len > 64) {
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return -EIO;
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}
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if (len > 1) {
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buffer_tx[0] |= LIS2DH_SPI_AUTOINC;
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}
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if (spi_transceive_dt(&cfg->bus_cfg.spi, &tx, &rx)) {
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return -EIO;
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}
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return 0;
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}
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static int lis2dh_raw_write(const struct device *dev, uint8_t reg_addr,
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uint8_t *value, uint8_t len)
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{
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const struct lis2dh_config *cfg = dev->config;
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uint8_t buffer_tx[1] = { reg_addr & ~LIS2DH_SPI_READ_BIT };
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const struct spi_buf tx_buf[2] = {
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{
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.buf = buffer_tx,
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.len = 1,
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},
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{
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.buf = value,
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.len = len,
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}
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};
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const struct spi_buf_set tx = {
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.buffers = tx_buf,
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.count = 2
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};
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if (len > 64) {
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return -EIO;
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}
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if (len > 1) {
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buffer_tx[0] |= LIS2DH_SPI_AUTOINC;
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}
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if (spi_write_dt(&cfg->bus_cfg.spi, &tx)) {
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return -EIO;
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}
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return 0;
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}
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static int lis2dh_spi_read_data(const struct device *dev, uint8_t reg_addr,
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uint8_t *value, uint8_t len)
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{
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return lis2dh_raw_read(dev, reg_addr, value, len);
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}
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static int lis2dh_spi_write_data(const struct device *dev, uint8_t reg_addr,
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uint8_t *value, uint8_t len)
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{
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return lis2dh_raw_write(dev, reg_addr, value, len);
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}
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static int lis2dh_spi_read_reg(const struct device *dev, uint8_t reg_addr,
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uint8_t *value)
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{
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return lis2dh_raw_read(dev, reg_addr, value, 1);
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}
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static int lis2dh_spi_write_reg(const struct device *dev, uint8_t reg_addr,
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uint8_t value)
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{
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uint8_t tmp_val = value;
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return lis2dh_raw_write(dev, reg_addr, &tmp_val, 1);
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}
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static int lis2dh_spi_update_reg(const struct device *dev, uint8_t reg_addr,
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uint8_t mask, uint8_t value)
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{
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uint8_t tmp_val;
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lis2dh_raw_read(dev, reg_addr, &tmp_val, 1);
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tmp_val = (tmp_val & ~mask) | (value & mask);
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return lis2dh_raw_write(dev, reg_addr, &tmp_val, 1);
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}
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static const struct lis2dh_transfer_function lis2dh_spi_transfer_fn = {
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.read_data = lis2dh_spi_read_data,
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.write_data = lis2dh_spi_write_data,
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.read_reg = lis2dh_spi_read_reg,
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.write_reg = lis2dh_spi_write_reg,
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.update_reg = lis2dh_spi_update_reg,
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};
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int lis2dh_spi_init(const struct device *dev)
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{
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struct lis2dh_data *data = dev->data;
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const struct lis2dh_config *cfg = dev->config;
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data->hw_tf = &lis2dh_spi_transfer_fn;
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if (!spi_is_ready_dt(&cfg->bus_cfg.spi)) {
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LOG_ERR("SPI bus is not ready");
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return -ENODEV;
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}
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return 0;
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}
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#endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) */
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