67 lines
1.2 KiB
Plaintext
67 lines
1.2 KiB
Plaintext
#include <arm/armv7-m.dtsi>
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#include <silabs/mem.h>
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/ {
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cpus {
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cpu@0 {
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compatible = "arm,cortex-m4f";
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};
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};
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flash0: flash {
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compatible = "soc-nv-flash";
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label = "FLASH_0";
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reg = <0 DT_FLASH_SIZE>;
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};
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sram0: memory {
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reg = <0x20000000 DT_SRAM_SIZE>;
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};
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soc {
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uart0: uart@4000c000 { /* USART0 */
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compatible = "silabs,efm32-usart";
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reg = <0x4000c000 0x400>;
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interrupts = <3 0 4 0>;
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status = "disabled";
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label = "UART_0";
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};
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uart1: uart@4000c400 { /* USART1 */
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compatible = "silabs,efm32-usart";
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reg = <0x4000c400 0x400>;
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interrupts = <15 0 16 0>;
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status = "disabled";
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label = "UART_1";
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};
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uart2: uart@4000c800 { /* USART2 */
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compatible = "silabs,efm32-usart";
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reg = <0x4000c800 0x400>;
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interrupts = <18 0 19 0>;
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status = "disabled";
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label = "UART_2";
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};
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uart3: uart@4000e000 { /* UART0 */
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compatible = "silabs,efm32-uart";
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reg = <0x4000e000 0x400>;
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interrupts = <20 0 21 0>;
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status = "disabled";
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label = "UART_3";
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};
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uart4: uart@4000e400 { /* UART1 */
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compatible = "silabs,efm32-uart";
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reg = <0x4000e400 0x400>;
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interrupts = <22 0 23 0>;
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status = "disabled";
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label = "UART_4";
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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