zephyr/arch/arm/soc
Gil Pitney 9d2f370ddb boards: cc3220sf_launchxl: Make cc3220sf XIP by default
Previously, there was no easy command-line solution for loading
a Zephyr program to (internal) flash.
So, the default development method was to load via gdb/openocd
to SRAM and debug from there, thus making the cc3220sf platform
non-XIP (CONFIG_XIP=n) by default.

With new openocd v 1.10 updates from TI (git.ti.com/sdo-emu),
the image can now be flashed and debugged via gdb/openocd,
so the default will be changed to XIP (CONFIG_XIP=y).

Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
2018-05-25 11:59:00 -05:00
..
arm arm_mpu: reduce boot MPU regions for various soc 2018-05-24 19:19:07 -04:00
atmel_sam arch: arm: atmel_sam: Add quotes to strings in Kconfig 2018-05-23 17:57:06 -04:00
atmel_sam0 arch: arm: atmel_sam: Add quotes to strings in Kconfig 2018-05-23 17:57:06 -04:00
nordic_nrf arm_mpu: reduce boot MPU regions for various soc 2018-05-24 19:19:07 -04:00
nxp_imx arm_mpu: reduce boot MPU regions for various soc 2018-05-24 19:19:07 -04:00
nxp_kinetis arch: arm: nxp: Fixup HAS_MCUX_RTC 2018-05-24 08:21:24 -05:00
nxp_lpc mcux: Add MCUX IPM driver for lpc and kinetis socs 2018-05-17 15:07:48 -05:00
silabs_exx32 arch: arm: soc: Cleanup Kconfig inclusion per SoC 2018-05-10 11:16:52 -05:00
st_stm32 soc: stm32f1: add port uart4 2018-05-25 11:58:20 -05:00
ti_lm3s6965 arch: arm: Refactor CONFIG_CORTEX_M 2018-03-10 11:42:25 -06:00
ti_simplelink boards: cc3220sf_launchxl: Make cc3220sf XIP by default 2018-05-25 11:59:00 -05:00
CMakeLists.txt