176 lines
4.9 KiB
C
176 lines
4.9 KiB
C
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief New thread creation for ARM Cortex-M
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*
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* Core thread related primitives for the ARM Cortex-M processor architecture.
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*/
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#include <kernel.h>
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#include <toolchain.h>
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#include <kernel_structs.h>
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#include <wait_q.h>
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#ifdef CONFIG_INIT_STACKS
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#include <string.h>
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#endif /* CONFIG_INIT_STACKS */
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#ifdef CONFIG_USERSPACE
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extern u8_t *_k_priv_stack_find(void *obj);
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#endif
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/**
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*
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* @brief Initialize a new thread from its stack space
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*
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* The control structure (thread) is put at the lower address of the stack. An
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* initial context, to be "restored" by __pendsv(), is put at the other end of
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* the stack, and thus reusable by the stack when not needed anymore.
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*
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* The initial context is an exception stack frame (ESF) since exiting the
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* PendSV exception will want to pop an ESF. Interestingly, even if the lsb of
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* an instruction address to jump to must always be set since the CPU always
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* runs in thumb mode, the ESF expects the real address of the instruction,
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* with the lsb *not* set (instructions are always aligned on 16 bit halfwords).
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* Since the compiler automatically sets the lsb of function addresses, we have
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* to unset it manually before storing it in the 'pc' field of the ESF.
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*
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* <options> is currently unused.
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*
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* @param pStackMem the aligned stack memory
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* @param stackSize stack size in bytes
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* @param pEntry the entry point
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* @param parameter1 entry point to the first param
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* @param parameter2 entry point to the second param
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* @param parameter3 entry point to the third param
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* @param priority thread priority
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* @param options thread options: K_ESSENTIAL, K_FP_REGS
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*
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* @return N/A
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*/
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void _new_thread(struct k_thread *thread, k_thread_stack_t *stack,
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size_t stackSize, k_thread_entry_t pEntry,
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void *parameter1, void *parameter2, void *parameter3,
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int priority, unsigned int options)
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{
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char *pStackMem = K_THREAD_STACK_BUFFER(stack);
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_ASSERT_VALID_PRIO(priority, pEntry);
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#if CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
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char *stackEnd = pStackMem + stackSize - MPU_GUARD_ALIGN_AND_SIZE;
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#else
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char *stackEnd = pStackMem + stackSize;
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#endif
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struct __esf *pInitCtx;
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_new_thread_init(thread, pStackMem, stackEnd - pStackMem, priority,
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options);
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/* carve the thread entry struct from the "base" of the stack */
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pInitCtx = (struct __esf *)(STACK_ROUND_DOWN(stackEnd -
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sizeof(struct __esf)));
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#if CONFIG_USERSPACE
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if (options & K_USER) {
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pInitCtx->pc = (u32_t)_arch_user_mode_enter;
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} else {
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pInitCtx->pc = (u32_t)_thread_entry;
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}
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#else
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pInitCtx->pc = (u32_t)_thread_entry;
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#endif
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/* force ARM mode by clearing LSB of address */
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pInitCtx->pc &= 0xfffffffe;
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pInitCtx->a1 = (u32_t)pEntry;
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pInitCtx->a2 = (u32_t)parameter1;
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pInitCtx->a3 = (u32_t)parameter2;
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pInitCtx->a4 = (u32_t)parameter3;
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pInitCtx->xpsr =
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0x01000000UL; /* clear all, thumb bit is 1, even if RO */
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thread->callee_saved.psp = (u32_t)pInitCtx;
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thread->arch.basepri = 0;
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#if CONFIG_USERSPACE
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thread->arch.mode = 0;
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thread->arch.priv_stack_start = 0;
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thread->arch.priv_stack_size = 0;
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#endif
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/* swap_return_value can contain garbage */
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/*
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* initial values in all other registers/thread entries are
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* irrelevant.
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*/
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#ifdef CONFIG_THREAD_MONITOR
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/*
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* In debug mode thread->entry give direct access to the thread entry
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* and the corresponding parameters.
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*/
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thread->entry = (struct __thread_entry *)(pInitCtx);
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thread_monitor_init(thread);
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#endif
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}
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#ifdef CONFIG_USERSPACE
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FUNC_NORETURN void _arch_user_mode_enter(k_thread_entry_t user_entry,
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void *p1, void *p2, void *p3)
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{
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/* Set up privileged stack before entering user mode */
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_current->arch.priv_stack_start =
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(u32_t)_k_priv_stack_find(_current->stack_obj);
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_current->arch.priv_stack_size =
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(u32_t)CONFIG_PRIVILEGED_STACK_SIZE;
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/* FIXME: Need a general API for aligning stacks so thet the initial
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* user thread stack pointer doesn't overshoot the granularity of MPU
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* regions, that works for ARM/NXP/QEMU.
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*/
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_current->stack_info.size &= ~0x1f;
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_arm_userspace_enter(user_entry, p1, p2, p3,
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(u32_t)_current->stack_info.start,
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_current->stack_info.size);
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CODE_UNREACHABLE;
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}
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#endif
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#if defined(CONFIG_BUILTIN_STACK_GUARD)
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/*
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* @brief Configure ARM built-in stack guard
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*
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* This function configures per thread stack guards by reprogramming
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* the built-in Process Stack Pointer Limit Register (PSPLIM).
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*
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* @param thread thread info data structure.
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*/
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void configure_builtin_stack_guard(struct k_thread *thread)
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{
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#if defined(CONFIG_USERSPACE)
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u32_t guard_start = thread->arch.priv_stack_start ?
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(u32_t)thread->arch.priv_stack_start :
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(u32_t)thread->stack_obj;
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#else
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u32_t guard_start = thread->stack_info.start;
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#endif
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#if defined(CONFIG_CPU_CORTEX_M_HAS_SPLIM)
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__set_PSPLIM(guard_start);
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#else
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#error "Built-in PSP limit checks not supported by HW"
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#endif
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}
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#endif /* CONFIG_BUILTIN_STACK_GUARD */
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