115 lines
2.6 KiB
ArmAsm
115 lines
2.6 KiB
ArmAsm
/*
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* Copyright (c) 2013-2014 Wind River Systems, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief ARM Cortex-M exception/interrupt exit API
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*
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*
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* Provides functions for performing kernel handling when exiting exceptions or
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* interrupts that are installed directly in the vector table (i.e. that are not
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* wrapped around by _isr_wrapper()).
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*/
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#include <kernel_structs.h>
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#include <offsets_short.h>
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#include <toolchain.h>
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#include <arch/cpu.h>
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_ASM_FILE_PROLOGUE
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GTEXT(_ExcExit)
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GTEXT(_IntExit)
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GDATA(_kernel)
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#ifdef CONFIG_TIMESLICING
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GTEXT(_update_time_slice_before_swap)
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#endif
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/**
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*
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* @brief Kernel housekeeping when exiting interrupt handler installed
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* directly in vector table
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*
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* Kernel allows installing interrupt handlers (ISRs) directly into the vector
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* table to get the lowest interrupt latency possible. This allows the ISR to be
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* invoked directly without going through a software interrupt table. However,
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* upon exiting the ISR, some kernel work must still be performed, namely
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* possible context switching. While ISRs connected in the software interrupt
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* table do this automatically via a wrapper, ISRs connected directly in the
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* vector table must invoke _IntExit() as the *very last* action before
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* returning.
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*
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* e.g.
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*
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* void myISR(void)
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* {
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* printk("in %s\n", __FUNCTION__);
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* doStuff();
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* _IntExit();
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* }
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*
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* @return N/A
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*/
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SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _IntExit)
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/* _IntExit falls through to _ExcExit (they are aliases of each other) */
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/**
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*
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* @brief Kernel housekeeping when exiting exception handler installed
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* directly in vector table
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*
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* See _IntExit().
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*
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* @return N/A
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*/
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SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _ExcExit)
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#ifdef CONFIG_PREEMPT_ENABLED
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ldr r0, =_kernel
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ldr r1, [r0, #_kernel_offset_to_current]
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ldr r0, [r0, _kernel_offset_to_ready_q_cache]
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cmp r0, r1
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beq _EXIT_EXC
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#ifdef CONFIG_TIMESLICING
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push {lr}
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bl _update_time_slice_before_swap
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#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
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pop {r0}
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mov lr, r0
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#else
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pop {lr}
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#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
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#endif /* CONFIG_TIMESLICING */
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/* context switch required, pend the PendSV exception */
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ldr r1, =_SCS_ICSR
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ldr r2, =_SCS_ICSR_PENDSV
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str r2, [r1]
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_ExcExitWithGdbStub:
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_EXIT_EXC:
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#endif /* CONFIG_PREEMPT_ENABLED */
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#ifdef CONFIG_STACK_SENTINEL
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push {lr}
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bl _check_stack_sentinel
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#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
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pop {r0}
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mov lr, r0
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#else
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pop {lr}
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#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
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#endif /* CONFIG_STACK_SENTINEL */
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bx lr
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