zephyr/arch/arm/soc/ti_simplelink/cc32xx
Kumar Gala ad18f84f50 arch: arm: Refactor CONFIG_CORTEX_M
Clean up Kconfig so each SoC just selects the specific Cortex-M
implementaiton rather than having to select both CORTEX_M and
CORTEX_{M0, M3, M4, etc.}.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-03-10 11:42:25 -06:00
..
CMakeLists.txt
Kconfig.defconfig.cc3220sf
Kconfig.defconfig.series
Kconfig.series arch: arm: Refactor CONFIG_CORTEX_M 2018-03-10 11:42:25 -06:00
Kconfig.soc
README
dts.fixup dts: ti: Refactor TI SoC dts.fixup into arch/arm/soc/ti_simplelink 2018-02-21 10:57:23 -06:00
linker.ld
soc.c
soc.h

README

CC3220 Info taken from:
* http://www.ti.com/lit/ug/swru465/swru465.pdf

Notes for CC3220SF:
 * Text must start at 0x800 offset in flash.  The first 0x800 bytes are
   reserved for the flash header.
 * See CONFIG_TEXT_SECTION_OFFSET.