158 lines
3.5 KiB
C
158 lines
3.5 KiB
C
/*
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* Copyright (c) 2016 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <logging/sys_log.h>
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#include <kernel.h>
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#include <device.h>
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#include <string.h>
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#include <flash.h>
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#include <errno.h>
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#include <init.h>
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#include <soc.h>
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#include "flash_priv.h"
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#include "fsl_common.h"
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#include "fsl_flash.h"
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struct flash_priv {
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flash_config_t config;
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/*
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* HACK: flash write protection is managed in software.
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*/
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struct k_sem write_lock;
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};
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/*
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* Interrupt vectors could be executed from flash hence the need for locking.
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* The underlying MCUX driver takes care of copying the functions to SRAM.
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*
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* For more information, see the application note below on Read-While-Write
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* http://cache.freescale.com/files/32bit/doc/app_note/AN4695.pdf
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*
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*/
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static int flash_mcux_erase(struct device *dev, off_t offset, size_t len)
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{
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struct flash_priv *priv = dev->driver_data;
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u32_t addr;
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status_t rc;
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int key;
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if (k_sem_take(&priv->write_lock, K_NO_WAIT)) {
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return -EACCES;
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}
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addr = offset + priv->config.PFlashBlockBase;
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key = irq_lock();
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rc = FLASH_Erase(&priv->config, addr, len, kFLASH_ApiEraseKey);
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irq_unlock(key);
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k_sem_give(&priv->write_lock);
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return (rc == kStatus_Success) ? 0 : -EINVAL;
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}
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static int flash_mcux_read(struct device *dev, off_t offset,
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void *data, size_t len)
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{
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struct flash_priv *priv = dev->driver_data;
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u32_t addr;
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/*
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* The MCUX supports different flash chips whose valid ranges are
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* hidden below the API: until the API export these ranges, we can not
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* do any generic validation
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*/
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addr = offset + priv->config.PFlashBlockBase;
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memcpy(data, (void *) addr, len);
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return 0;
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}
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static int flash_mcux_write(struct device *dev, off_t offset,
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const void *data, size_t len)
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{
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struct flash_priv *priv = dev->driver_data;
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u32_t addr;
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status_t rc;
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int key;
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if (k_sem_take(&priv->write_lock, K_NO_WAIT)) {
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return -EACCES;
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}
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addr = offset + priv->config.PFlashBlockBase;
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key = irq_lock();
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rc = FLASH_Program(&priv->config, addr, (uint32_t *) data, len);
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irq_unlock(key);
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k_sem_give(&priv->write_lock);
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return (rc == kStatus_Success) ? 0 : -EINVAL;
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}
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static int flash_mcux_write_protection(struct device *dev, bool enable)
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{
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struct flash_priv *priv = dev->driver_data;
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int rc = 0;
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if (enable) {
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rc = k_sem_take(&priv->write_lock, K_FOREVER);
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} else {
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k_sem_give(&priv->write_lock);
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}
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return rc;
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}
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#if defined(CONFIG_FLASH_PAGE_LAYOUT)
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static const struct flash_pages_layout dev_layout = {
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.pages_count = KB(CONFIG_FLASH_SIZE) / FLASH_ERASE_BLOCK_SIZE,
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.pages_size = FLASH_ERASE_BLOCK_SIZE,
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};
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static void flash_mcux_pages_layout(struct device *dev,
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const struct flash_pages_layout **layout,
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size_t *layout_size)
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{
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*layout = &dev_layout;
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*layout_size = 1;
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}
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#endif /* CONFIG_FLASH_PAGE_LAYOUT */
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static struct flash_priv flash_data;
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static const struct flash_driver_api flash_mcux_api = {
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.write_protection = flash_mcux_write_protection,
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.erase = flash_mcux_erase,
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.write = flash_mcux_write,
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.read = flash_mcux_read,
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#if defined(CONFIG_FLASH_PAGE_LAYOUT)
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.page_layout = flash_mcux_pages_layout,
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#endif
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.write_block_size = FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE,
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};
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static int flash_mcux_init(struct device *dev)
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{
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struct flash_priv *priv = dev->driver_data;
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status_t rc;
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k_sem_init(&priv->write_lock, 0, 1);
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rc = FLASH_Init(&priv->config);
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return (rc == kStatus_Success) ? 0 : -EIO;
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}
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DEVICE_AND_API_INIT(flash_mcux, FLASH_DEV_NAME,
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flash_mcux_init, &flash_data, NULL, POST_KERNEL,
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, &flash_mcux_api);
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