147 lines
4.6 KiB
C
147 lines
4.6 KiB
C
/*
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*
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* Copyright (c) 2021 metraTec GmbH
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* Copyright (c) 2021 Peter Johanson
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file Driver for MPC23Sxx SPI-based GPIO driver.
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*/
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#include <errno.h>
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#include <zephyr/sys/byteorder.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/spi.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#include "gpio_mcp23xxx.h"
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#define LOG_LEVEL CONFIG_GPIO_LOG_LEVEL
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(gpio_mcp23sxx);
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static int mcp23sxx_read_port_regs(const struct device *dev, uint8_t reg, uint16_t *buf)
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{
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const struct mcp23xxx_config *config = dev->config;
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uint16_t port_data = 0;
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int ret;
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uint8_t nread = (config->ngpios == 8) ? 1 : 2;
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uint8_t addr = MCP23SXX_ADDR | MCP23SXX_READBIT;
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uint8_t buffer_tx[4] = { addr, reg, 0, 0 };
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uint8_t buffer_rx[4] = { 0 };
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const struct spi_buf tx_buf = {
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.buf = buffer_tx,
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.len = 4,
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};
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const struct spi_buf_set tx = {
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.buffers = &tx_buf,
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.count = 1,
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};
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const struct spi_buf rx_buf = {
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.buf = buffer_rx,
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.len = 2 + nread,
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};
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const struct spi_buf_set rx = {
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.buffers = &rx_buf,
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.count = 1,
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};
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ret = spi_transceive_dt(&config->bus.spi, &tx, &rx);
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if (ret < 0) {
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LOG_ERR("spi_transceive FAIL %d\n", ret);
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return ret;
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}
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port_data = ((uint16_t)buffer_rx[3] << 8 | buffer_rx[2]);
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*buf = sys_le16_to_cpu(port_data);
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return 0;
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}
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static int mcp23sxx_write_port_regs(const struct device *dev, uint8_t reg, uint16_t value)
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{
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const struct mcp23xxx_config *config = dev->config;
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int ret;
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uint8_t nwrite = (config->ngpios == 8) ? 1 : 2;
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uint16_t port_data = sys_cpu_to_le16(value);
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uint8_t port_a_data = port_data & 0xFF;
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uint8_t port_b_data = (port_data >> 8) & 0xFF;
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port_data = sys_cpu_to_le16(value);
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uint8_t addr = MCP23SXX_ADDR;
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uint8_t buffer_tx[4] = { addr, reg, port_a_data, port_b_data };
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const struct spi_buf tx_buf[1] = {
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{
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.buf = buffer_tx,
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.len = nwrite + 2,
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}
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};
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const struct spi_buf_set tx = {
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.buffers = tx_buf,
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.count = ARRAY_SIZE(tx_buf),
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};
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ret = spi_write_dt(&config->bus.spi, &tx);
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if (ret < 0) {
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LOG_ERR("spi_write FAIL %d\n", ret);
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return ret;
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}
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return 0;
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}
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static int mcp23sxx_bus_is_ready(const struct device *dev)
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{
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const struct mcp23xxx_config *config = dev->config;
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if (!spi_is_ready_dt(&config->bus.spi)) {
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LOG_ERR("SPI bus %s not ready", config->bus.spi.bus->name);
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return -ENODEV;
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}
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return 0;
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}
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#define DT_DRV_COMPAT microchip_mcp23sxx
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#define GPIO_MCP23SXX_DEVICE(inst) \
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static struct mcp23xxx_drv_data mcp23sxx_##inst##_drvdata = { \
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/* Default for registers according to datasheet */ \
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.reg_cache.iodir = 0xFFFF, .reg_cache.ipol = 0x0, .reg_cache.gpinten = 0x0, \
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.reg_cache.defval = 0x0, .reg_cache.intcon = 0x0, .reg_cache.iocon = 0x0, \
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.reg_cache.gppu = 0x0, .reg_cache.intf = 0x0, .reg_cache.intcap = 0x0, \
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.reg_cache.gpio = 0x0, .reg_cache.olat = 0x0, \
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}; \
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static struct mcp23xxx_config mcp23sxx_##inst##_config = { \
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.config = { \
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(inst), \
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}, \
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.bus = { \
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.spi = SPI_DT_SPEC_INST_GET(inst, \
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SPI_OP_MODE_MASTER | SPI_MODE_CPOL | \
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SPI_MODE_CPHA | SPI_WORD_SET(8), 0) \
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}, \
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.gpio_int = GPIO_DT_SPEC_INST_GET_OR(inst, int_gpios, {0}), \
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.gpio_reset = GPIO_DT_SPEC_INST_GET_OR(inst, reset_gpios, {0}), \
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.ngpios = DT_INST_PROP(inst, ngpios), \
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.read_fn = mcp23sxx_read_port_regs, \
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.write_fn = mcp23sxx_write_port_regs, \
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.bus_fn = mcp23sxx_bus_is_ready \
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}; \
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DEVICE_DT_INST_DEFINE(inst, gpio_mcp23xxx_init, NULL, &mcp23sxx_##inst##_drvdata, \
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&mcp23sxx_##inst##_config, POST_KERNEL, \
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CONFIG_GPIO_MCP23SXX_INIT_PRIORITY, &gpio_mcp23xxx_api_table);
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DT_INST_FOREACH_STATUS_OKAY(GPIO_MCP23SXX_DEVICE)
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