105 lines
1.6 KiB
Plaintext
105 lines
1.6 KiB
Plaintext
/*
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* Copyright (c) 2019-2020 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <arm/armv8-m.dtsi>
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/ {
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compatible = "arm,v2m-musca";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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led0 = &red_led;
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led1 = &green_led;
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led2 = &blue_led;
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};
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chosen {
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zephyr,console = &uart1;
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zephyr,sram = &sram0;
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zephyr,flash = &mram0;
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zephyr,shell-uart = &uart1;
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};
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leds {
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compatible = "gpio-leds";
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red_led: led_0 {
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gpios = <&gpio 2 0>;
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label = "User LED1";
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};
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green_led: led_1 {
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gpios = <&gpio 3 0>;
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label = "User LED2";
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};
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blue_led: led_2 {
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gpios = <&gpio 4 0>;
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label = "User LED3";
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-m33";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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mpu: mpu@e000ed90 {
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compatible = "arm,armv8m-mpu";
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reg = <0xe000ed90 0x40>;
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arm,num-mpu-regions = <8>;
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};
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};
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};
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mram0: mram@1a000000 {
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/* Internal code eMRAM */
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reg = <0x1a000000 0x200000>;
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};
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flash0: flash@10200000 {
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/* External QSPI flash */
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reg = <0x10200000 0x2000000>;
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};
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sram0: memory@30000000 {
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compatible = "mmio-sram";
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reg = <0x30000000 0x80000>;
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};
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sysclk: system-clock {
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compatible = "fixed-clock";
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clock-frequency = <50000000>;
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#clock-cells = <0>;
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};
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scc@5010b000 {
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compatible = "arm,scc";
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reg = <0x5010b000 0x1000>;
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};
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soc {
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peripheral@50000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x50000000 0x10000000>;
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#include "v2m_musca_s1-common.dtsi"
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};
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};
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};
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&nvic {
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arm,num-irq-priority-bits = <3>;
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};
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