94 lines
2.1 KiB
Plaintext
94 lines
2.1 KiB
Plaintext
/*
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* Copyright (c) 2017 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/l4/stm32l475.dtsi>
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/ {
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soc {
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compatible = "st,stm32l496", "st,stm32l4", "simple-bus";
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clocks {
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clk_hsi48: clk-hsi48 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <DT_FREQ_M(48)>;
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status = "disabled";
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};
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};
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rng: rng@50060800 {
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00040000>,
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<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
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};
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i2c4: i2c@40008400 {
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compatible = "st,stm32-i2c-v2";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40008400 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000002>;
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interrupts = <83 0>, <84 0>;
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interrupt-names = "event", "error";
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status = "disabled";
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};
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pinctrl: pin-controller@48000000 {
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reg = <0x48000000 0x2400>;
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gpioi: gpio@48002000 {
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compatible = "st,stm32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x48002000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000100>;
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};
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};
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can2: can@40006800 {
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compatible = "st,stm32-bxcan";
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reg = <0x40006800 0x400>;
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interrupts = <86 0>, <87 0>, <88 0>, <89 0>;
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interrupt-names = "TX", "RX0", "RX1", "SCE";
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>; //RCC_APB1ENR1_CAN2EN
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master-can-reg = <0x40006400>;
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status = "disabled";
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};
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aes: aes@50060000 {
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compatible = "st,stm32-aes";
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reg = <0x50060000 0x400>;
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00010000>;
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resets = <&rctl STM32_RESET(AHB2, 16U)>;
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interrupts = <79 0>;
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interrupt-names = "aes";
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status = "disabled";
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};
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usbotg_fs: otgfs@50000000 {
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clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00001000>,
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<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
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};
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sdmmc1: sdmmc@40012800 {
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clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000400>,
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<&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
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};
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};
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die_temp: dietemp {
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ts-cal2-temp = <130>;
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};
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smbus4: smbus4 {
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compatible = "st,stm32-smbus";
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#address-cells = <1>;
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#size-cells = <0>;
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i2c = <&i2c4>;
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status = "disabled";
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};
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};
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