156 lines
9.4 KiB
C
156 lines
9.4 KiB
C
/* SoC level DTS fixup file */
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#define CONFIG_ADC_0_BASE_ADDRESS NXP_KINETIS_ADC16_4003B000_BASE_ADDRESS
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#define CONFIG_ADC_0_IRQ NXP_KINETIS_ADC16_4003B000_IRQ_0
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#define CONFIG_ADC_0_IRQ_PRI NXP_KINETIS_ADC16_4003B000_IRQ_0_PRIORITY
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#define CONFIG_ADC_0_NAME NXP_KINETIS_ADC16_4003B000_LABEL
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#define CONFIG_I2C_0_NAME NXP_KINETIS_I2C_40066000_LABEL
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#define CONFIG_I2C_MCUX_0_BASE_ADDRESS NXP_KINETIS_I2C_40066000_BASE_ADDRESS
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#define CONFIG_I2C_MCUX_0_IRQ NXP_KINETIS_I2C_40066000_IRQ_0
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#define CONFIG_I2C_MCUX_0_IRQ_PRI NXP_KINETIS_I2C_40066000_IRQ_0_PRIORITY
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#define CONFIG_I2C_MCUX_0_BITRATE NXP_KINETIS_I2C_40066000_CLOCK_FREQUENCY
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#define CONFIG_I2C_1_NAME NXP_KINETIS_I2C_40067000_LABEL
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#define CONFIG_I2C_MCUX_1_BASE_ADDRESS NXP_KINETIS_I2C_40067000_BASE_ADDRESS
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#define CONFIG_I2C_MCUX_1_IRQ NXP_KINETIS_I2C_40067000_IRQ_0
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#define CONFIG_I2C_MCUX_1_IRQ_PRI NXP_KINETIS_I2C_40067000_IRQ_0_PRIORITY
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#define CONFIG_I2C_MCUX_1_BITRATE NXP_KINETIS_I2C_40067000_CLOCK_FREQUENCY
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#define CONFIG_FTM_1_BASE_ADDRESS NXP_KINETIS_FTM_40039000_BASE_ADDRESS
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#define CONFIG_FTM_1_IRQ NXP_KINETIS_FTM_40039000_IRQ_0
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#define CONFIG_FTM_1_IRQ_PRI NXP_KINETIS_FTM_40039000_IRQ_0_PRIORITY
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#define CONFIG_FTM_1_NAME NXP_KINETIS_FTM_40039000_LABEL
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#define CONFIG_SIM_BASE_ADDRESS NXP_KINETIS_SIM_40047000_BASE_ADDRESS
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#define CONFIG_SIM_NAME NXP_KINETIS_SIM_40047000_LABEL
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#define CONFIG_RTC_MCUX_0_BASE_ADDRESS NXP_KINETIS_RTC_4003D000_BASE_ADDRESS
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#define CONFIG_RTC_MCUX_0_IRQ_PRI NXP_KINETIS_RTC_4003D000_IRQ_0_PRIORITY
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#define CONFIG_RTC_MCUX_0_IRQ NXP_KINETIS_RTC_4003D000_IRQ_0
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#define CONFIG_RTC_MCUX_0_NAME NXP_KINETIS_RTC_4003D000_LABEL
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#define CONFIG_RTC_PRESCALER NXP_KINETIS_RTC_4003D000_PRESCALER
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#define CONFIG_RTC_0_NAME NXP_KINETIS_RTC_4003D000_LABEL
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#if defined(CONFIG_SOC_MKW22D5) || defined(CONFIG_SOC_MKW24D5)
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_MCUX_0_BAUD_RATE NXP_KINETIS_UART_4006A000_CURRENT_SPEED
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#define CONFIG_UART_MCUX_0_NAME NXP_KINETIS_UART_4006A000_LABEL
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#define CONFIG_UART_MCUX_0_IRQ_ERROR NXP_KINETIS_UART_4006A000_IRQ_ERROR
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#define CONFIG_UART_MCUX_0_IRQ_ERROR_PRI NXP_KINETIS_UART_4006A000_IRQ_ERROR_PRIORITY
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#define CONFIG_UART_MCUX_0_IRQ_STATUS NXP_KINETIS_UART_4006A000_IRQ_STATUS
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#define CONFIG_UART_MCUX_0_IRQ_STATUS_PRI NXP_KINETIS_UART_4006A000_IRQ_STATUS_PRIORITY
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#define CONFIG_UART_MCUX_0_CLOCK_NAME NXP_KINETIS_UART_4006A000_CLOCK_CONTROLLER
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#define CONFIG_UART_MCUX_0_CLOCK_SUBSYS NXP_KINETIS_UART_4006A000_CLOCK_NAME
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#define CONFIG_UART_MCUX_1_BAUD_RATE NXP_KINETIS_UART_4006B000_CURRENT_SPEED
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#define CONFIG_UART_MCUX_1_NAME NXP_KINETIS_UART_4006B000_LABEL
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#define CONFIG_UART_MCUX_1_IRQ_ERROR NXP_KINETIS_UART_4006B000_IRQ_ERROR
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#define CONFIG_UART_MCUX_1_IRQ_ERROR_PRI NXP_KINETIS_UART_4006B000_IRQ_ERROR_PRIORITY
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#define CONFIG_UART_MCUX_1_IRQ_STATUS NXP_KINETIS_UART_4006B000_IRQ_STATUS
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#define CONFIG_UART_MCUX_1_IRQ_STATUS_PRI NXP_KINETIS_UART_4006B000_IRQ_STATUS_PRIORITY
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#define CONFIG_UART_MCUX_1_CLOCK_NAME NXP_KINETIS_UART_4006B000_CLOCK_CONTROLLER
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#define CONFIG_UART_MCUX_1_CLOCK_SUBSYS NXP_KINETIS_UART_4006B000_CLOCK_NAME
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#define CONFIG_UART_MCUX_2_BAUD_RATE NXP_KINETIS_UART_4006C000_CURRENT_SPEED
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#define CONFIG_UART_MCUX_2_NAME NXP_KINETIS_UART_4006C000_LABEL
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#define CONFIG_UART_MCUX_2_IRQ_ERROR NXP_KINETIS_UART_4006C000_IRQ_ERROR
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#define CONFIG_UART_MCUX_2_IRQ_ERROR_PRI NXP_KINETIS_UART_4006C000_IRQ_ERROR_PRIORITY
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#define CONFIG_UART_MCUX_2_IRQ_STATUS NXP_KINETIS_UART_4006C000_IRQ_STATUS
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#define CONFIG_UART_MCUX_2_IRQ_STATUS_PRI NXP_KINETIS_UART_4006C000_IRQ_STATUS_PRIORITY
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#define CONFIG_UART_MCUX_2_CLOCK_NAME NXP_KINETIS_UART_4006C000_CLOCK_CONTROLLER
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#define CONFIG_UART_MCUX_2_CLOCK_SUBSYS NXP_KINETIS_UART_4006C000_CLOCK_NAME
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#define CONFIG_UART_MCUX_3_BAUD_RATE NXP_KINETIS_UART_4006D000_CURRENT_SPEED
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#define CONFIG_UART_MCUX_3_NAME NXP_KINETIS_UART_4006D000_LABEL
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#define CONFIG_UART_MCUX_3_IRQ_ERROR NXP_KINETIS_UART_4006D000_IRQ_ERROR
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#define CONFIG_UART_MCUX_3_IRQ_ERROR_PRI NXP_KINETIS_UART_4006D000_IRQ_ERROR_PRIORITY
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#define CONFIG_UART_MCUX_3_IRQ_STATUS NXP_KINETIS_UART_4006D000_IRQ_STATUS
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#define CONFIG_UART_MCUX_3_IRQ_STATUS_PRI NXP_KINETIS_UART_4006D000_IRQ_STATUS_PRIORITY
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#define CONFIG_UART_MCUX_3_CLOCK_NAME NXP_KINETIS_UART_4006D000_CLOCK_CONTROLLER
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#define CONFIG_UART_MCUX_3_CLOCK_SUBSYS NXP_KINETIS_UART_4006D000_CLOCK_NAME
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#define FLASH_DEV_BASE_ADDRESS NXP_KINETIS_FTFL_40020000_BASE_ADDRESS
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#define FLASH_DEV_NAME NXP_KINETIS_FTFL_40020000_LABEL
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#define CONFIG_WDT_0_NAME NXP_KINETIS_WDOG_40052000_LABEL
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#define CONFIG_WDT_0_BASE_ADDRESS NXP_KINETIS_WDOG_40052000_BASE_ADDRESS
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#define CONFIG_WDT_0_IRQ NXP_KINETIS_WDOG_40052000_IRQ_0
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#define CONFIG_WDT_0_IRQ_PRI NXP_KINETIS_WDOG_40052000_IRQ_0_PRIORITY
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#define CONFIG_WDT_0_CLOCK_NAME NXP_KINETIS_WDOG_40052000_CLOCK_CONTROLLER
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#define CONFIG_WDT_0_CLOCK_SUBSYS NXP_KINETIS_WDOG_40052000_CLOCK_NAME
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#define CONFIG_SPI_0_NAME NXP_KINETIS_DSPI_4002C000_LABEL
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#define CONFIG_SPI_0_BASE_ADDRESS NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS
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#define CONFIG_SPI_0_IRQ NXP_KINETIS_DSPI_4002C000_IRQ_0
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#define CONFIG_SPI_0_IRQ_PRI NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY
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#define CONFIG_SPI_0_CLOCK_NAME NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER
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#define CONFIG_SPI_0_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002C000_CLOCK_NAME
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#define CONFIG_SPI_1_NAME NXP_KINETIS_DSPI_4002D000_LABEL
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#define CONFIG_SPI_1_BASE_ADDRESS NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS
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#define CONFIG_SPI_1_IRQ NXP_KINETIS_DSPI_4002D000_IRQ_0
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#define CONFIG_SPI_1_IRQ_PRI NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY
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#define CONFIG_SPI_1_CLOCK_NAME NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER
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#define CONFIG_SPI_1_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002D000_CLOCK_NAME
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#define CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_BUS_NAME
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#define CONFIG_IEEE802154_MCR20A_SPI_SLAVE NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_BASE_ADDRESS
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#define CONFIG_IEEE802154_MCR20A_SPI_FREQ NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_SPI_MAX_FREQUENCY
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#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME NXP_KINETIS_DSPI_4002D000_CS_GPIOS_CONTROLLER
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#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN NXP_KINETIS_DSPI_4002D000_CS_GPIOS_PIN
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#define CONFIG_MCR20A_GPIO_IRQ_B_NAME NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_IRQB_GPIOS_CONTROLLER
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#define CONFIG_MCR20A_GPIO_IRQ_B_PIN NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_IRQB_GPIOS_PIN
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#define CONFIG_MCR20A_GPIO_RESET_NAME NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_RESET_GPIOS_CONTROLLER
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#define CONFIG_MCR20A_GPIO_RESET_PIN NXP_KINETIS_DSPI_4002D000_NXP_MCR20A_0_RESET_GPIOS_PIN
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#define CONFIG_USBD_KINETIS_NAME NXP_KINETIS_USBD_40072000_LABEL
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#define CONFIG_USBD_KINETIS_IRQ NXP_KINETIS_USBD_40072000_IRQ_USB_OTG
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#define CONFIG_USBD_KINETIS_IRQ_PRI NXP_KINETIS_USBD_40072000_IRQ_USB_OTG_PRIORITY
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#define CONFIG_USBD_KINETIS_BASE_ADDRESS NXP_KINETIS_USBD_40072000_BASE_ADDRESS
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#define CONFIG_USBD_KINETIS_NUM_BIDIR_EP NXP_KINETIS_USBD_40072000_NUM_BIDIR_ENDPOINTS
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#define CONFIG_ENTROPY_MCUX_RNGA_BASE_ADDRESS NXP_KINETIS_RNGA_40029000_BASE_ADDRESS
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#define CONFIG_ENTROPY_MCUX_RNGA_IRQ NXP_KINETIS_RNGA_40029000_IRQ_0
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#define CONFIG_ENTROPY_MCUX_RNGA_IRQ_PRI NXP_KINETIS_RNGA_40029000_IRQ_0_PRIORITY
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#define CONFIG_ENTROPY_MCUX_RNGA_NAME NXP_KINETIS_RNGA_40029000_LABEL
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#define CONFIG_ENTROPY_NAME NXP_KINETIS_RNGA_40029000_LABEL
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#endif /* CONFIG_SOC_MKW22D5 || CONFIG_SOC_MKW24D5 */
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#if defined(CONFIG_SOC_MKW40Z4) || defined(CONFIG_SOC_MKW41Z4)
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE NXP_KINETIS_LPUART_40054000_CURRENT_SPEED
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#define CONFIG_UART_MCUX_LPUART_0_IRQ NXP_KINETIS_LPUART_40054000_IRQ_0
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#define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI NXP_KINETIS_LPUART_40054000_IRQ_0_PRIORITY
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#define CONFIG_UART_MCUX_LPUART_0_NAME NXP_KINETIS_LPUART_40054000_LABEL
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#define CONFIG_UART_MCUX_LPUART_0_CLOCK_NAME NXP_KINETIS_LPUART_40054000_CLOCK_CONTROLLER
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#define CONFIG_UART_MCUX_LPUART_0_CLOCK_SUBSYS NXP_KINETIS_LPUART_40054000_CLOCK_NAME
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#define FLASH_DEV_BASE_ADDRESS NXP_KINETIS_FTFA_40020000_BASE_ADDRESS
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#define FLASH_DEV_NAME NXP_KINETIS_FTFA_40020000_LABEL
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#define CONFIG_SPI_0_NAME NXP_KINETIS_DSPI_4002C000_LABEL
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#define CONFIG_SPI_0_BASE_ADDRESS NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS
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#define CONFIG_SPI_0_IRQ NXP_KINETIS_DSPI_4002C000_IRQ_0
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#define CONFIG_SPI_0_IRQ_PRI NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY
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#define CONFIG_SPI_0_CLOCK_NAME NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER
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#define CONFIG_SPI_0_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002C000_CLOCK_NAME
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#define CONFIG_SPI_1_NAME NXP_KINETIS_DSPI_4002D000_LABEL
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#define CONFIG_SPI_1_BASE_ADDRESS NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS
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#define CONFIG_SPI_1_IRQ NXP_KINETIS_DSPI_4002D000_IRQ_0
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#define CONFIG_SPI_1_IRQ_PRI NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY
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#define CONFIG_SPI_1_CLOCK_NAME NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER
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#define CONFIG_SPI_1_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002D000_CLOCK_NAME
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#define CONFIG_ENTROPY_MCUX_TRNG_BASE_ADDRESS NXP_KINETIS_TRNG_40029000_BASE_ADDRESS
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#define CONFIG_ENTROPY_MCUX_TRNG_IRQ NXP_KINETIS_TRNG_40029000_IRQ_0
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#define CONFIG_ENTROPY_MCUX_TRNG_IRQ_PRI NXP_KINETIS_TRNG_40029000_IRQ_0_PRIORITY
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#define CONFIG_ENTROPY_MCUX_TRNG_NAME NXP_KINETIS_TRNG_40029000_LABEL
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#define CONFIG_ENTROPY_NAME NXP_KINETIS_TRNG_40029000_LABEL
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#endif /* CONFIG_SOC_MKW40Z4 || CONFIG_SOC_MKW41Z4 */
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/* End of SoC Level DTS fixup file */
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